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NUS CDE Researchers Pioneer Self-Testing Quantum Chip to Enhance Digital Security

June 9, 2026
in Mathematics
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NUS CDE Researchers Pioneer Self-Testing Quantum Chip to Enhance Digital Security — Mathematics

NUS CDE Researchers Pioneer Self-Testing Quantum Chip to Enhance Digital Security

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In an era where digital security underpins nearly every facet of modern life, the generation of truly unpredictable random numbers has become an indispensable pillar, safeguarding communications, financial systems, and digital signatures. However, traditional random number generators (RNGs), whether classical or quantum, have long relied on the assumption that their internal hardware operates exactly as specified by manufacturers. This implicit trust has posed a vulnerability, as no mechanism existed to verify the ongoing integrity of measurement devices, leaving potential openings for subtle defects or even malicious tampering to render the output predictable without raising alarms.

Addressing this critical shortcoming, a research team led by Associate Professor Charles Lim at the National University of Singapore’s College of Design and Engineering (NUS CDE) has pioneered a revolutionary quantum random number generator (QRNG) chip. Departing from the conventional “trusted-device” paradigm, this device is capable of autonomously verifying the integrity of its measurement hardware in real time, ensuring that the randomness it produces remains genuinely secure even against adversaries equipped with quantum computational powers. Published in the journal PRX Quantum on June 5, 2026, this accomplishment represents a paradigm shift in the security assurances that quantum cryptographic systems can offer.

At the heart of the team’s innovation lies an advanced measurement-device-independent (MDI) protocol. Unlike existing QRNGs, which necessitate complete trust in every hardware component from lasers to detectors, the MDI protocol relaxes this assumption substantially. It requires the user to trust solely the quantum states prepared and sent into the device, rather than the detector reading the outcomes. Within each operational cycle, the chip generates a series of predetermined quantum light states internally and directs these toward an on-chip optical detector whose behavior remains uncharacterized and untrusted. A sophisticated scoring algorithm then evaluates the detector’s responses against strict predictions derived from quantum mechanics, effectively “weighting the scales” to confirm the device’s fidelity during every measurement. Only if the detector’s performance meets these rigorous standards are random bits distilled; any deviation halts the process entirely, preventing potentially compromised randomness from being output.

This novel self-testing capability is not solely a theoretical advance but is realized within a chip that integrates both the signal encoder and optical detector onto a single silicon platform fabricated through an eight-inch wafer process typical of commercial semiconductor manufacturing. This integration is notable because it allows the device to operate at room temperature without the need for cryogenic cooling or specialized single-photon detectors, which are traditionally required in quantum optical setups, thereby enhancing its viability for widespread practical deployment.

Developing this silicon-based photonic architecture introduced its own set of technical challenges, particularly due to the intrinsic coupling between phase and amplitude modulation in silicon light modulators. Adjusting the timing or phase of the light wave inadvertently altered its brightness, potentially distorting the delicate quantum states pivotal for secure randomness generation. To circumvent this, the researchers crafted a tailored driving scheme exploiting the modulators’ nonlinear response characteristics, effectively decoupling phase shifts from amplitude changes. This ensured that the quantum states remained pristine, preserving the integrity of the randomness certification process.

The chip’s on-board photodetector demonstrated a total efficiency of 69.1%, surpassing the protocol’s minimum threshold of 67%, which is crucial for the measurement device-independent assumptions to hold. During experimental runs, the device produced more certified random bits than it consumed in seeded input randomness, unmistakably confirming that it was generating “fresh” randomness reflective of inherent quantum unpredictability rather than recycling existing entropy—a milestone in chip-based QRNG performance.

Crucially, the research team’s chip achieves the highest level of chip-borne security demonstrated to date in quantum random number generation. Their security model contemplates the most formidable possible adversary—one possessing quantum correlations with the detector hardware itself. This represents a significantly elevated threat level compared to classical attacks, as quantum entanglement could be exploited to infer or influence the measurement outcomes. Accordingly, traditional classical device testing methods fall short, while this chip’s MDI approach provides robust guarantees to withstand such quantum-enabled threats.

However, these profound security guarantees come with trade-offs. The chip’s experimental bit generation rate stands at a modest 64 bits per second, considerably slower than conventional “trusted” QRNG chips capable of surpassing 100 gigabits per second. Such disparities illustrate an intrinsic tension in the field: stronger security assurances via reduced trust in hardware are intrinsically balanced against lower throughput performance. The focal bottleneck is the efficiency of the photodetector, which directly affects the randomness extraction rate.

Looking toward future improvements, the team has already fabricated laboratory prototypes of photodiodes achieving efficiencies as high as 92.4%. Simulations based on these enhanced components suggest that, when integrated into the same MDI protocol framework, the QRNG chip could realize rates of about 68 megabits per second—a leap of more than five orders of magnitude over the current practical demonstration. Such gains would enable the technology to bridge the gap between uncompromising security and application-scale throughput requirements.

Associate Professor Charles Lim emphasizes the broad implications of this advancement, noting that “provably secure randomness is essential wherever decisions hinge on numbers that must remain unpredictable.” This includes burgeoning fields such as artificial intelligence, financial services, healthcare, and the burgeoning Internet of Things ecosystem, where reliable cryptographic primitives are foundational. By embedding real-time self-testing directly onto the chip, this research paves a transformative pathway toward compact, practical quantum random number generators that integrate seamlessly into secure systems of tomorrow.

The collaboration also involved NUS spin-off Squareroot8 Technologies, who contributed to the protocol design and independently certified the security of the device, enhancing confidence that this approach meets stringent industry requirements for quantum communication hardware. Together, academia and industry have forged a new standard in quantum-certified security that is both practically realizable and theoretically robust.

In synthesis, this self-testing quantum random number generator chip not only challenges long-standing assumptions in cryptographic hardware trust models but also delivers a tangible, integrated solution poised to elevate the resilience of digital security infrastructures globally. As quantum technologies progressively mature and adversaries gain access to quantum computational capabilities, innovations like this will be pivotal in preserving confidentiality and integrity in the digital domain for years to come.


Subject of Research: Not applicable

Article Title: Self-Testing Quantum Randomness Expansion on an Integrated Photonic Chip

News Publication Date: 5-Jun-2026

Web References:
– https://dx.doi.org/10.1103/h7kt-m5fc
– https://cde.nus.edu.sg/ece/staff/charles-lim-ci-wen/
– https://cde.nus.edu.sg/ece/
– https://cde.nus.edu.sg/

References:
Charles Lim et al., “Self-Testing Quantum Randomness Expansion on an Integrated Photonic Chip,” PRX Quantum, June 5, 2026.

Image Credits: College of Design and Engineering, NUS

Keywords: Quantum cryptography, Photonics, Cybersecurity, Electrical engineering

Tags: autonomous measurement device validationdigital security enhancementNUS CDE quantum researchPRX Quantum publication 2026quantum computational adversariesquantum random number generator chipquantum-resistant digital securityreal-time hardware integrity verificationsecure quantum cryptographyself-testing quantum devicestrusted-device paradigm shiftunpredictability in random number generation
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