Every cryptographic key, every device identity, and every random number that secures a modern electronic system ultimately rests on a physical process that an adversary cannot infer. For decades, that foundation has been built largely on one class of device: the memristor, a passive two-terminal element whose resistance depends on the entire history of current that has flowed through it. Now a mini-review published in Frontiers in Electronics by Francisco J. Romero of the University of Granada and colleagues argues that the memristor’s better-known success may be blinding the hardware security community to something far more powerful. The review systematically surveys the three families of memory circuit elements, or mem-elements, and concludes that the two least explored members, the memcapacitor and the meminductor, could offer fundamentally stronger guarantees for next-generation security primitives precisely because their memory is coupled with energy storage rather than pure dissipation.
The theoretical privilege of mem-elements among candidate security substrates stems from a single constitutive property: their present electrical response cannot be fully determined without knowledge of their past excitation history. This history dependence translates directly into security-relevant characteristics. The partial inaccessibility of internal state variables provides a physical basis for unclonability, which is the property exploited in physical unclonable functions, or PUFs. Sensitivity to initial conditions and intrinsic switching stochasticity support the unpredictability required by true random number generators, or TRNGs. And the high-dimensional chaotic dynamics of multi-element memory circuits enable sustained entropy generation that resists data-driven inference. The review’s comparative table shows how sharply the three families differ: memristors are commercially available in resistive random access memory and phase-change memory, memcapacitors exist only as laboratory demonstrations in ferroelectric and electrolyte-gated structures, and meminductive behavior in a passive two-terminal element was experimentally reported only in 2023.
Memristor-based PUFs have been realized across a striking range of material platforms, including hafnium oxide-based RRAM, phase-change materials, graphene oxide, and laser-induced graphene, demonstrating competitive uniqueness and reliability metrics. The memristor is particularly well suited to this purpose because its resistance state depends not only on the present bias but on the entire excitation history, and its fabrication-induced variability, which originates from stochastic filament formation, interface roughness, and local dopant fluctuations, produces device-specific signatures that are difficult to replicate. Yet the review identifies a structural vulnerability that runs through both classical delay-based and memristive PUFs: their responses can be modelled with high accuracy from relatively modest challenge-response datasets. Standard arbiter PUFs are broken by logistic regression with prediction accuracies exceeding 99 percent using as few as roughly 2,000 challenge-response pairs, and even XOR-augmented variants require only tens of thousands. The susceptibility is structural rather than incidental, because the underlying low-dimensional state space can be tracked and reproduced by an adversary with sufficient data, regardless of the inference technique employed.
Memristive TRNGs harvest entropy from the stochastic nature of resistive switching events, specifically from the probabilistic nucleation and dissolution of conductive filaments under applied bias, or from charge-trapping fluctuations in ferroelectric structures. Two operational regimes have been exploited: switching-time jitter, where the random delay between voltage application and state transition is digitized to extract random bits, and cycle-to-cycle resistance-state variability harvesting, where the spread in programmed conductance values across successive switching events serves as the entropy source. One notable hardware demonstration integrated a hexagonal boron nitride memristor with a commercial microcontroller, passing all NIST statistical tests at low operating voltages. Compared with thermal-noise or ring-oscillator generators, memristive TRNGs offer clear advantages in miniaturization and CMOS compatibility, though two persistent challenges remain: characterizing the entropy source under aging and cycling stress, and the temperature dependence of filament stochasticity, which can introduce statistical bias at operating extremes and requires post-processing correction or adaptive biasing.
Beyond their use as stochastic switching elements, memristors enable autonomous chaotic oscillators without additional nonlinear components, since the hysteretic nonlinearity of the device itself sustains complex attractor dynamics. Memristive variants of the Chua circuit produce chaotic trajectories in a three-dimensional state space defined by terminal voltage, current, and the internal state variable, with positive Lyapunov exponents providing a well-defined measure of the entropy generation rate. From a security standpoint, the critical property is not chaos alone but its combination with the partial inaccessibility of that internal state to external measurement. An adversary monitoring terminal voltage and current observes only a projected shadow of the full state trajectory, while the internal variable evolves in an unobservable dimension. The main limitation, however, is that memristor-only topologies typically sustain a single positive Lyapunov exponent, constraining attractor dimensionality and the adversary’s prediction horizon, which is exactly what motivates the transition to multi-element memory circuits.
The memcapacitor and the meminductor extend the mem-element family to reactive components. A voltage-controlled memcapacitor is formally defined by a capacitance linking the time integral of charge to the flux, the time integral of voltage, so that its constitutive relation involves the second integral of the current and the first integral of the voltage. The meminductor is defined analogously in the domain relating the time integral of flux to charge. Both devices exhibit pinched hysteresis loops in their respective characteristic planes, confirming the memory nature of their response. The critical distinction from the memristor is that both devices combine memory with energy storage, so their internal state can evolve through passive or weakly dissipative dynamics, with complexity arising without the sustained energy expenditure associated with resistive switching. At the model level, state trajectories are not necessarily subject to the thermal relaxation that affects memristive internal variables at zero bias, a property with potential implications for idle-state retention that awaits experimental validation.
The most significant and least explored scenario arises when memcapacitors and meminductors operate jointly, potentially alongside a memristor. The simultaneous presence of electrical and magnetic memory introduces multiple coupled internal state variables operating across distinct energy domains, each contributing at least one independent state variable defined by its constitutive relation, producing a high-dimensional phase space whose accessible dynamics cannot be reproduced by any single mem-element type alone. This coupling prevents monotonic relaxation, increases effective state-space dimensionality, and enables hyperchaotic regimes with two or more positive Lyapunov exponents, substantially increasing the rate of information generation relative to simple chaotic circuits. Three properties of joint operation are particularly interesting from a security standpoint. Dimensional scaling is structural rather than incidental, since each additional mem-element of a distinct type expands the accessible phase space without active components, making complexity intrinsic to the circuit topology rather than to design effort. Extreme multistability, the coexistence of multiple stable oscillatory regimes accessible from different initial conditions, is directly exploitable in PUF design, because manufacturing variability determines which attractor the circuit settles into, producing a device-specific signature whose diversity grows with attractor dimensionality. Most fundamentally, inference resistance in memcapacitor-meminductor circuits has a physical rather than computational basis: because the state variables of reactive mem-elements evolve under energy-conservative dynamics, reconstructing the full system state from terminal measurements requires solving an inverse problem of substantially higher complexity than for purely resistive systems.
The review is careful to draw a clear boundary between demonstrated and speculative results. Chaotic, hyperchaotic, and multistable dynamics of coupled memcapacitor-meminductor circuits have been verified experimentally through emulator implementations, which faithfully reproduce constitutive relations and circuit-level dynamics while differing from real devices in noise spectral density, thermal behavior, and scalability, all of which are directly security-relevant. The security-specific properties, including attractor-based uniqueness, entropy quality, and inference resistance, remain theoretical propositions awaiting experimental validation. Emulator-based validation faces a deeper limitation: emulators cannot reproduce the fabrication-induced variability and noise properties that are precisely the source of security-relevant entropy in real devices. Overcoming this requires dedicated characterization platforms for emerging memcapacitive implementations, specifically targeted at security metrics rather than at neuromorphic or storage applications. No systematic study has yet characterized memcapacitor- or meminductor-based circuits against entropy or randomness standards, nor formalized the conditions under which their internal states become unobservable from external electrical measurements.
Several critical questions collectively define the frontier. No appropriate benchmarking framework exists: current evaluation tools such as NIST SP 800-22 and standard PUF metrics were designed for digital circuits and do not capture properties specific to continuous-state analog devices. New metrics grounded in dynamical systems theory are needed, such as the Kolmogorov-Sinai entropy rate as a measure of analog entropy generation, or mutual information between terminal measurements and internal state variables as a proxy for inference resistance. By Pesin’s identity, the Kolmogorov-Sinai entropy equals the sum of the positive Lyapunov exponents, directly linking entropy generation to the hyperchaotic dynamics characterized above. A practical route toward standardization is to estimate these indicators from measured time series using established embedding and Lyapunov-spectrum algorithms, validate them on emulator testbeds against a ground-truth model, and ultimately incorporate them as extensions of entropy-source validation methodologies such as NIST SP 800-90B. A further gap concerns the formalization of resistance to modelling attacks: the expanded state-space dimensionality of reactive mem-element circuits is qualitatively argued to improve resilience against machine-learning-based adversaries, but no formal bound on the sample complexity required for successful modelling attacks has been established, and deriving such bounds analogous to Vapnik-Chervonenkis-dimension arguments would transform a qualitative intuition into a verifiable security claim.
The asymmetry documented in the review reflects less a judgment about relative security value than the historical accident of technological maturation: memristors achieved experimental demonstration decades before their reactive counterparts, and security researchers naturally followed the available technology. Established approaches such as SRAM-PUFs, ring-oscillator PUFs, and quantum random number generators each offer well-characterized entropy sources, but none combines history dependence, energy-storing memory, and intrinsic high-dimensional chaos within a single passive circuit element. The unique advantage of memcapacitor-meminductor systems lies precisely in this confluence, where complexity, partial non-observability, and device-specific variability emerge together from the same physical mechanism without requiring digital post-processing or external noise injection. The mathematical framework to exploit this is already in place, combining the constitutive formalism of mem-elements with standard tools of nonlinear dynamical systems theory, including state-space modelling, Lyapunov analysis, and nonlinear observability; what is missing is its systematic application to security-oriented circuit design. The authors outline a plausible research roadmap spanning three horizons: in the short term, circuit-theoretic analysis of observability limits and emulator-based evaluation against established randomness standards; in the medium term, device-level validation of emulator predictions on emerging solid-state memcapacitors; and in the longer term, the deliberate engineering of the high-dimensional state space of multi-mem-element circuits into deployable security primitives, an opportunity that is, at present, entirely unrealized. Four practical challenges will ultimately determine deployability: device-to-device variability, which is double-edged in providing the entropy that sustains uniqueness while threatening response reproducibility; long-term stability and aging, whose failure modes under cycling and thermal stress remain largely uncharacterized for memcapacitors and meminductors; and CMOS integration, where no mem-element material family is yet process-compatible with the others or with standard flows. These device-level problems are expected to intensify as system complexity grows, since each added mem-element multiplies the sources of variability and drift, and in a coupled nonlinear circuit the aging of a single device can reshape the attractor landscape or cross a bifurcation boundary, meaning that reliability engineering must scale with the very dimensionality that provides the security benefits.
Subject of Research: Memory circuit elements, including memristors, memcapacitors, and meminductors, as physical substrates for hardware security primitives such as PUFs and TRNGs.
Article Title: Memory circuit elements for hardware security: a review from memristors to memcapacitors and meminductors
Article References: Romero, F. J., Habboush, S., Hatefinasab, S., Fernandez, C., Ohata, A., Castillo, E., Morales, D. P., & Rodriguez, N. (2026). Memory circuit elements for hardware security: a review from memristors to memcapacitors and meminductors. Frontiers in Electronics, 7, Article 1919384. https://doi.org/10.3389/felec.2026.1919384
Image Credits: AI Generated
DOI: 10.3389/felec.2026.1919384
Keywords: memristor, memcapacitor, meminductor, hardware security, physical unclonable function, true random number generator, entropy generation, nonlinear dynamics, Memory, circuit, elements, hardware
Cite Scienmag News
Denise Maddox. (October 15, 2026). Memory circuit elements for hardware security: a review from memristors to memcapacitors and meminductors. Scienmag. https://scienmag.com/memory-circuit-elements-for-hardware-security-a-review-from-memristors-to-memcapacitors-and-meminductors/
Denise Maddox. "Memory circuit elements for hardware security: a review from memristors to memcapacitors and meminductors." Scienmag, 15 October 2026, https://scienmag.com/memory-circuit-elements-for-hardware-security-a-review-from-memristors-to-memcapacitors-and-meminductors/. Accessed 15 October 2026.
Denise Maddox. "Memory circuit elements for hardware security: a review from memristors to memcapacitors and meminductors." Scienmag. October 15, 2026. https://scienmag.com/memory-circuit-elements-for-hardware-security-a-review-from-memristors-to-memcapacitors-and-meminductors/

