Horizontal-Up Microfluidics Pushes Dielectric Chip Cooling Past 1,500 Watts per Square Centimeter

As transistors shrink and chips pack ever more processing power into every square millimeter, the heat they generate has become one of the defining bottlenecks of modern electronics. A team of researchers at Peking University has now unveiled a new embedded cooling architecture that could ease that bottleneck dramatically. Writing in Nature Electronics, Wei Xiao, Zhihu Wu, Bai Song and colleagues describe a horizontal-up manifold microchannel cooler that uses a dielectric fluid rather than water, achieving a critical heat flux of up to 1,570 watts per square centimeter. That figure is remarkable because previous dielectric-coolant techniques have generally been limited to below 1,000 watts per square centimeter, even when aided by pre-cooling and pre-pressurization of the working fluid.

The significance of the result lies in the tension at the heart of chip cooling. Water is, in many respects, the ideal coolant: it has a high specific heat capacity and excellent thermal conductivity, and embedded microfluidic systems that etch cooling channels directly into the silicon substrate have used it to dissipate heat fluxes as high as 3,000 watts per square centimeter. But water conducts electricity. In a device where coolant channels run mere micrometers from active circuitry, any leak, condensation or ionic contamination risks short circuits and catastrophic failure. Dielectric fluids such as HFE-7100, the fluorinated engineered fluid used in this study, are electrically insulating and therefore inherently safe to place in intimate contact with live electronics. The price of that safety has traditionally been poorer thermal performance, because dielectric fluids have lower specific heat and thermal conductivity than water.

The Peking University group’s answer is a geometric one. Their device, which they call a horizontal-up manifold microchannel cooler, or HUMMC, reorganizes the way liquid enters and vapor leaves the cooling structure. The manifold features horizontal inlets that facilitate liquid replenishment across the heated area, paired with vertical outlets that accelerate the evacuation of vapor. This separation of duties is crucial in two-phase cooling, where the coolant boils as it absorbs heat and the resulting vapor must be removed quickly to make room for fresh liquid. When vapor lingers over hot surfaces, it forms insulating films that choke heat transfer and can trigger the dreaded critical heat flux condition, the point at which the surface temperature surges uncontrollably because liquid can no longer reach it.

Manifold microchannel architectures are not new. In a conventional design, coolant is distributed from above through an array of alternating inlets and outlets, forcing it to flow short distances laterally through fine microchannels etched into the substrate before exiting. This shortens the flow path dramatically compared with a single long channel and boosts heat transfer coefficients substantially. The team’s earlier work, published in 2025, pushed jet-enhanced manifold microchannels cooled with water to an extraordinary 3,000 watts per square centimeter, a level comparable to the heat flux at the surface of the sun’s photosphere and far beyond what any conventional heat sink can manage. The challenge was to bring that class of performance to a dielectric fluid, whose lower heat capacity, lower thermal conductivity and poorer wetting characteristics make flow boiling far harder to sustain at extreme fluxes.

The horizontal-up configuration addresses the specific failure modes of dielectric flow boiling. Because the inlets run horizontally, liquid is delivered in a way that maintains a robust supply to the heated walls even as vigorous boiling generates vapor. The vertical outlets, meanwhile, give buoyant vapor a direct escape route, preventing it from accumulating in the channels and disrupting the liquid film. The researchers compared their HUMMC design against a standard parallel manifold microchannel configuration, referred to as SPMC in their thermo-hydraulic performance comparisons, and found the horizontal-up arrangement delivered markedly higher critical heat flux along with operational stability at the highest cooling loads. The combination of rapid replenishment and rapid venting effectively delays the onset of dryout, the local exhaustion of liquid that caps the performance of most two-phase coolers.

Two-phase cooling itself deserves explanation, because it is the physical engine behind these numbers. Unlike single-phase cooling, where the coolant simply warms up as it flows, two-phase cooling exploits the latent heat of vaporization. When the coolant boils, each kilogram of fluid absorbs far more energy than it could by a temperature rise alone, and the boiling process itself sustains high heat transfer coefficients at the wall. The trade-off is complexity: flow boiling in microchannels is prone to instabilities, pressure fluctuations and premature dryout, all of which worsen as the fluid’s surface tension rises and its latent heat falls, exactly the regime of dielectric fluids. Engineering the channel geometry to manage the two-phase flow, rather than merely to carry liquid, is therefore the central design problem, and it is precisely where the horizontal-up manifold makes its contribution.

The fabrication approach is equally important for the technology’s prospects. The cooler is built using microelectromechanical systems technology, the same suite of processes that underpins standard semiconductor manufacturing. That means the cooling structures can, in principle, be directly integrated with chip fabrication and scaled across wafers, rather than bolted on as an afterthought. Embedded cooling of this kind places the microchannels within millimeters, or even micrometers, of the transistor hot spots, slashing the thermal resistance between the heat source and the coolant. This co-design of electronics and microfluidics echoes a broader trend in the field: earlier landmark work demonstrated monolithic microfluidic cooling integrated into gallium nitride power electronics, and researchers have explored exotic substrates such as diamond and boron arsenide, materials with exceptional thermal conductivity, to spread heat before it reaches the coolant.

The motivation for such extreme measures is easy to find in the trajectory of the industry. Data centers powering artificial intelligence workloads are consuming electricity at a pace that strains grids, and a growing fraction of that energy goes into cooling. Wide-bandgap and ultra-wide-bandgap power devices, including gallium nitride transistors, concentrate heat into ever smaller footprints, and their reliability and lifetime degrade rapidly as channel temperatures climb. Defense electronics, radar and laser systems face similar constraints. Agencies such as the United States Defense Advanced Research Projects Agency have run programs explicitly targeting device-scale heat removal, recognizing that thermal limits now gate performance as surely as transistor scaling once did. A cooler that handles kilowatt-per-square-centimeter fluxes with an electrically inert fluid addresses all of these use cases at once.

The dielectric route also opens possibilities that water cannot offer. Because HFE-7100 and similar engineered fluids are insulating, they can be used in immersion cooling schemes, where entire boards are bathed in liquid, or in embedded systems where coolant contacts or nearly contacts live circuitry without elaborate sealing and isolation. The fluid’s low boiling point suits it to two-phase operation at temperatures compatible with silicon devices. The trade-off remains cost and thermophysical performance, which is why the demonstration of 1,570 watts per square centimeter with a dielectric fluid is more than an incremental record. It shows that with the right manifold geometry, the safety advantage of dielectric coolants no longer has to be purchased with a threefold penalty in heat flux capability.

There are, of course, steps between a laboratory demonstration and deployment in a server rack or a radar array. The researchers report operational stability at their highest cooling performance, and their comparison against representative two-phase cooling technologies, from spray cooling to pool boiling on enhanced surfaces to other embedded manifold designs, places the HUMMC at the top of the dielectric-cooled field. Scaling the approach to full-size chips, integrating the fluid delivery plumbing with real packages, and proving long-term reliability with fluorinated coolants are the natural next challenges. But the core insight, that separating horizontal liquid replenishment from vertical vapor evacuation unlocks dielectric two-phase cooling at fluxes once thought reachable only with water, gives chip designers a new tool at exactly the moment thermal constraints are tightening around the industry. As computing demand accelerates, the machines of the future may well be cooled from the inside out, by insulating liquids flowing through silicon labyrinths etched alongside the circuits they protect.

Subject of Research: Embedded two-phase microfluidic cooling of high-power chips using a dielectric fluid in a horizontal-up manifold architecture

Article Title: Horizontal-up microfluidics for embedded chip cooling with a dielectric fluid

Article References: Xiao, W., Wu, Z., Jiang, Z., Wang, Y., Wang, W., & Song, B. (2026). Horizontal-up microfluidics for embedded chip cooling with a dielectric fluid. Nature Electronics. https://doi.org/10.1038/s41928-026-01724-y

Image Credits: AI Generated

DOI: 10.1038/s41928-026-01724-y

Keywords: microfluidics, chip cooling, thermal management, dielectric fluid, HFE-7100, two-phase cooling, manifold microchannels, critical heat flux, embedded cooling, MEMS, Nature Electronics, electronics cooling