Cascaded Quantum Memory Brings Random Access to Superconducting Computers

Random access memory is the quiet workhorse of every classical computer, the component that lets a processor reach any stored bit on demand without stepping through its neighbours in sequence. Now a team of physicists has demonstrated a quantum analogue of this essential hardware element, building an eight-bit cascaded random access quantum memory entirely from superconducting circuits. The achievement, reported in Nature Physics by researchers at Stanford University, the University of Chicago, Fermi National Accelerator Laboratory, New York University and Rutgers University, addresses one of the most conspicuous gaps between the architecture of conventional machines and the emerging generation of quantum processors.

The experiment, led by Ziqian Li and Eesh Gupta, who contributed equally, together with senior author David I. Schuster, showcases a device in which seven distinct memory modes can be individually addressed through a single transmon qubit acting as a classical control intermediary. Crucially, the memory modes are not raw qubits exposed to the noise of the processing layer. Instead, they live inside a multimode storage cavity, and a carefully engineered buffer layer sits between the processor and the cavity, isolating the fragile stored quantum states from the nonlinear elements that make computation possible but also make errors likely.

The need for such a device is easy to appreciate when one considers how modern superconducting quantum processors actually operate. In today’s machines, every physical qubit is tied to its own dedicated control lines, readout resonators and filters. A logical qubit protected by a surface code can demand dozens of physical qubits, each with its own coaxial cable running down into the dilution refrigerator. The wiring burden grows so quickly that scaling to useful machines has become as much a problem of engineering and cryogenics as of quantum physics. A random access memory flips this picture: if quantum information can be parked in high-coherence storage and retrieved on demand through a small number of shared control channels, the number of lines required per logical qubit falls dramatically, and the logic and storage subsystems can each be optimised separately.

The conceptual foundations for quantum random access memory stretch back to 2008, when Giovannetti, Lloyd and Maccone formalised the idea of a structure that could be queried in superposition, an operation at the heart of several quantum algorithms with proven exponential advantages. Practical implementations, however, have lagged far behind their classical counterparts. Demonstration efforts in other platforms, including a 105-mode random access memory realised with atomic ensembles in 2019, showed that the principle could be realised, but superconducting processors, the leading candidate for fault-tolerant quantum computation, notably lacked an equivalent. Architectural proposals from computer scientists, including work by Baker, Schuster and Chong on memory-equipped quantum architectures, argued that the power of random access could reshape how error-corrected machines are organised, but the hardware to realise such a vision did not yet exist.

The new device closes that gap with an elegant layered design. At its heart is a multimode microwave storage cavity, a single physical object that supports many electromagnetic modes at distinct frequencies, each capable of holding a quantum state for a long time. Seamless cavities of this kind have previously achieved photon lifetimes measured in tens or even hundreds of milliseconds, far exceeding the coherence of planar transmon qubits. A single transmon, the workhorse qubit of the superconducting world, provides the address mechanism: by tuning the transmon into resonance with a selected cavity mode, the experimenters can swap a quantum state into or out of that mode while leaving the others untouched.

The crucial innovation is the cascaded architecture with its buffer layer. Directly coupling a transmon to a multimode cavity creates a problem: the strong nonlinearity of the qubit, which enables control, also pushes unwanted photons and residual excitations back into the memory, degrading the stored states through induced dephasing and other many-body effects. The team solved this by inserting an intermediate buffer mode between the processor and the storage cavity, cascading the interactions so that the storage modes are only weakly, virtually engaged during operation. The single transmon then classically addresses the seven memory modes through this buffer, addressing them one at a time while the full stack remains protected from processor nonlinearities.

The performance figures reported are striking for a first demonstration. Arbitrary random access across the eight-bit device, meaning the ability to write to or read from any chosen memory mode on demand, was achieved with an average infidelity of less than 1.5 percent per mode. The researchers did not stop at headline numbers: they characterised the dominant error processes in detail, showing that residual many-body interactions within the multimode cavity set the present error budget. This kind of honest error accounting matters enormously for the path forward, because it tells engineers exactly which physical mechanisms must be suppressed as the architecture is scaled to more modes and longer storage times.

Beyond mere storage, the architecture supports operations performed transversally within the memory module, meaning operations that act across the encoded information without spreading errors from one component to its neighbours, a key requirement for fault tolerance. Combined with the drastic reduction in control lines per logical qubit, this positions the cascaded random access memory as a candidate unit cell for fault-tolerant quantum architectures. In such a scheme, the memory module would hold many logical qubits in long-lived cavity modes, a modest number of transmons would provide address and control, and dedicated processors would operate on retrieved states, each subsystem optimised on its own terms. The authors describe the result as enabling resource-efficient control of logical qubits, separating the problems of high-speed logic and long-duration storage that currently fight for the same physical qubits.

The work also resonates with a broader trend in the field towards bosonic and multimode approaches to quantum information. Error-corrected logical qubits encoded in oscillator states, dual-rail cavity qubits with erasure detection, and high-quality-factor niobium and coaxial cavities have all advanced rapidly in recent years, with several experiments now reaching or exceeding the break-even point for quantum error correction. What has been missing is a way to organise many such high-performance memories into an addressable, switchable whole. The cascaded random access memory provides exactly that missing layer of organisation, and it does so using components, transmons, cavities and parametric couplers, that are already compatible with existing superconducting processor fabrication.

There remain, of course, substantial challenges between this eight-bit demonstration and the megabyte-scale ambitions of quantum computing. Error rates must fall further, storage times must lengthen relative to operation times, and the many-body interaction effects that dominate the current error budget must be engineered away or incorporated into error models. The researchers have made their data and simulation codes openly available through figshare, an invitation for the community to probe, reproduce and extend the results. Yet the conceptual milestone is unambiguous. Classical computing took its decisive step towards scalability when memory was separated from logic and made randomly accessible. Quantum computing has now taken an analogous step, demonstrating that a single control qubit can reach into a protected reservoir of quantum states and retrieve any one of them on demand. If the approach scales as its designers hope, the random access quantum memory may come to be seen as the moment quantum hardware began to acquire the architectural maturity that classical machines have enjoyed for decades.

Subject of Research: Demonstration of an eight-bit cascaded random access quantum memory using superconducting circuits, transmons and multimode storage cavities for scalable fault-tolerant quantum computing.

Article Title: A cascaded random access quantum memory

Article References: Li, Z., Gupta, E., Zhao, F., Banerjee, R., Lu, Y., Roy, T., Oriani, A., Vrajitoarea, A., Chakram, S., & Schuster, D. I. (2026). A cascaded random access quantum memory. Nature Physics. https://doi.org/10.1038/s41567-026-03418-w

Image Credits: AI Generated

DOI: 10.1038/s41567-026-03418-w

Keywords: quantum memory, random access memory, superconducting circuits, transmon qubit, multimode cavity, quantum computing, fault tolerance, quantum error correction, circuit quantum electrodynamics, logical qubits, cascaded architecture, quantum architecture