<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:wfw="http://wellformedweb.org/CommentAPI/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	xmlns:atom="http://www.w3.org/2005/Atom"
	xmlns:sy="http://purl.org/rss/1.0/modules/syndication/"
	xmlns:slash="http://purl.org/rss/1.0/modules/slash/"
	>

<channel>
	<title>SONOS memory &#8211; Science</title>
	<atom:link href="https://scienmag.com/tag/sonos-memory/feed/" rel="self" type="application/rss+xml" />
	<link>https://scienmag.com</link>
	<description></description>
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	<language>en-US</language>
	<sy:updatePeriod>
	hourly	</sy:updatePeriod>
	<sy:updateFrequency>
	1	</sy:updateFrequency>
	<generator>https://wordpress.org/?v=7.1.3</generator>

<image>
	<url>https://scienmag.com/wp-content/uploads/2024/07/cropped-scienmag_ico-32x32.jpg</url>
	<title>SONOS memory &#8211; Science</title>
	<link>https://scienmag.com</link>
	<width>32</width>
	<height>32</height>
</image> 
<site xmlns="com-wordpress:feed-additions:1">73899611</site>	<item>
		<title>Analogue Memory Chips Run Fast Fourier Transforms for Edge Signal Processing</title>
		<link>https://scienmag.com/analogue-memory-chips-run-fast-fourier-transforms-for-edge-signal-processing/</link>
		
		<dc:creator><![CDATA[Denise Maddox]]></dc:creator>
		<pubDate>Mon, 19 Oct 2026 16:57:32 +0000</pubDate>
				<category><![CDATA[Technology and Engineering]]></category>
		<category><![CDATA[analog memory chips]]></category>
		<category><![CDATA[analogue computing]]></category>
		<category><![CDATA[analogue signal processing in electronics]]></category>
		<category><![CDATA[charge-trapping memory]]></category>
		<category><![CDATA[charge-trapping memory arrays]]></category>
		<category><![CDATA[digital vs analogue signal processing]]></category>
		<category><![CDATA[edge computing hardware]]></category>
		<category><![CDATA[edge devices]]></category>
		<category><![CDATA[edge signal processing]]></category>
		<category><![CDATA[energy efficiency]]></category>
		<category><![CDATA[Fast Fourier Transform]]></category>
		<category><![CDATA[Fourier transform efficiency]]></category>
		<category><![CDATA[high-speed Fourier transforms]]></category>
		<category><![CDATA[in-memory computing]]></category>
		<category><![CDATA[Nature Electronics]]></category>
		<category><![CDATA[non-volatile memory]]></category>
		<category><![CDATA[real-time data analysis]]></category>
		<category><![CDATA[Sandia National Laboratories]]></category>
		<category><![CDATA[signal frequency analysis]]></category>
		<category><![CDATA[Signal Processing]]></category>
		<category><![CDATA[SONOS memory]]></category>
		<category><![CDATA[synthetic-aperture radar]]></category>
		<guid isPermaLink="false">https://scienmag.com/?p=313849</guid>

					<description><![CDATA[Researchers have experimentally demonstrated analogue fast Fourier transforms on charge-trapping memory arrays, computing transforms of up to 65,536 points across more than 524,000 devices in a single chip.]]></description>
										<content:encoded><![CDATA[<p>The fast Fourier transform has been the workhorse of digital signal processing for more than six decades, quietly underpinning everything from radar imaging and wireless communication to speech recognition and medical imaging. Now a team of researchers at Sandia National Laboratories, working with colleagues at Infineon Technologies and Arizona State University, has shown that this quintessentially digital algorithm can be executed far more efficiently in an entirely different way: by encoding the computation directly into the physics of analogue memory devices. In a study published in Nature Electronics, the researchers demonstrate analogue fast Fourier transforms running on arrays of charge-trapping memory cells, achieving transforms of up to 65,536 points while activating more than 524,000 memory devices simultaneously within a single array.</p>
<p>To appreciate why this is significant, it helps to understand what the Fourier transform does and why it dominates edge computing workloads. The discrete Fourier transform converts a signal sampled in time, such as a microphone waveform, into its constituent frequencies. This frequency-domain view is what allows a smartphone to compress audio, a radar system to form images of terrain, and a 5G modem to demodulate orthogonal frequency-division multiplexed data. For any device that senses the physical world and must act on what it senses, the Fourier transform is often the first and most demanding step of the processing pipeline.</p>
<p>The problem is computational cost. A direct discrete Fourier transform of N data points requires a number of operations that grows roughly with N squared, which becomes prohibitive for the large datasets modern sensors produce. In 1965, James Cooley and John Tukey introduced the fast Fourier transform algorithm, which recursively breaks a large transform into smaller ones and reduces the cost to a scale proportional to N log N. That algorithmic leap made large transforms practical, but it came with a catch: the fast Fourier transform is inherently a digital construction, a carefully orchestrated sequence of multiplications, additions and data shuffles that must be executed step by step on digital processors. Analogue hardware, which can perform many operations at once by letting physical currents and voltages do the arithmetic, has never been able to exploit this divide-and-conquer structure.</p>
<p>Analogue in-memory computing has matured rapidly in recent years, largely driven by artificial intelligence workloads. In this paradigm, a matrix of non-volatile memory devices stores numerical weights as physical conductance values. When input voltages are applied to the rows of the array, Kirchhoff&#8217;s current law sums the resulting currents along the columns, performing a matrix-vector multiplication in the time it takes signals to propagate through the circuit, with energy costs many orders of magnitude below digital hardware. Chips built on this principle have demonstrated impressive gains for neural network inference, but the technique has been confined to operations that map onto a single large matrix. A brute-force Fourier transform of the size needed for real signals would require a memory array containing a number of devices proportional to the transform size squared, quickly becoming absurdly large.</p>
<p>The Sandia-led team&#8217;s central insight is that the Cooley-Tukey decomposition itself can be reformulated as a sequence of matrix multiplications, and matrix multiplications are precisely what analogue in-memory arrays excel at. Rather than building one enormous array to represent the full transform, the researchers decompose a large transform into a cascade of smaller butterfly operations, each implemented on a modest array of memory devices. Intermediate results between stages are stored and routed in a way that allows the same physical hardware to be reused across stages. Because the total number of memory devices required grows only in proportion to N rather than N squared, the approach can scale to arbitrarily large transforms without impractically large or numerous arrays, preserving the essential complexity advantage that made the digital FFT famous.</p>
<p>The experimental platform is built on SONOS, a silicon-oxide-nitride-oxide-silicon charge-trapping memory technology that stores analogue weight values as trapped charge. SONOS devices are attractive for this application because they offer stable, programmable conductance states with good endurance and can operate at low power, even in subthreshold regimes. For the demonstrations, the team processed one-dimensional audio signals and two-dimensional image signals, performing precise analogue computations across up to 524,288 memory devices active at once within a single array. The audio experiments included computing a full 65,536-point frequency spectrum, a scale that rivals what dedicated digital signal processors handle in commercial systems.</p>
<p>The quality of the results matters as much as the scale. The researchers demonstrated that spoken audio reconstructed from the complex-valued transform outputs computed by the SONOS array remained intelligible, effectively closing the loop from analogue transform back to usable signal. For two-dimensional data, they applied a vector-radix fast Fourier transform approach, an extension of the Cooley-Tukey idea to multidimensional signals, to process images. Two-dimensional Fourier transforms are the computational core of synthetic aperture radar imaging, a technique used in Earth observation and defence applications, and the team&#8217;s simulations benchmarked the accuracy, energy consumption and performance of the analogue approach against established digital implementations, including a reconfigurable FFT implementation on a modern Xilinx Versal adaptive computing platform.</p>
<p>Analogue computation always raises the question of precision. Physical devices are noisy, drift with temperature and age, and cannot match the exactness of digital arithmetic. The research team addressed this with careful error analysis and simulation using CrossSim, an open-source accuracy simulator for analogue in-memory computing developed at Sandia, together with hardware-aware techniques that account for device imperfections during operation. Because Fourier transforms feed into downstream applications such as object detection or speech recognition, the ultimate measure of success is not bit-exact agreement with a digital processor but whether the transformed output supports accurate end-to-end performance. The experiments and simulations indicate that the precision achievable with charge-trapping memory is sufficient for demanding signal processing tasks.</p>
<p>The implications extend across a wide range of technologies. Edge devices such as sensors, wearables, autonomous vehicles and Internet-of-things nodes are increasingly deployed to sense and act on physical-world information, but they are constrained by battery budgets that digital processors strain against. Fourier transforms appear throughout these systems: in wireless communication standards that modulate data across thousands of subcarriers, in frequency-modulated continuous-wave LiDAR, in radar and in the spectrograms that feed modern speech recognition models trained on large-scale audio datasets. An analogue front end that performs these transforms at a fraction of the energy cost could meaningfully extend battery life or enable real-time processing that is currently impractical. The technique could also complement the growing interest in Fourier-based machine learning architectures, such as Fourier neural operators used for solving partial differential equations.</p>
<p>None of this means digital signal processors will disappear. Analogue in-memory computing trades programmability and exactness for efficiency, and hybrid systems that pair an analogue transform engine with digital post-processing are the most likely near-term outcome. Device reliability, manufacturing variability and the analogue-to-digital conversion overhead all remain engineering challenges. But the demonstration that the most important algorithm in signal processing can be mapped onto physical memory arrays, at a scale of half a million devices operating in concert, marks a genuine expansion of what analogue computing can do. Sixty years after Cooley and Tukey showed that clever mathematics could tame the Fourier transform, a new generation of hardware is showing that clever circuits can tame it again.</p>
<p><strong>Subject of Research:</strong> Analogue in-memory computing implementations of fast Fourier transforms for energy-efficient edge signal processing</p>
<p><strong>Article Title:</strong> Analogue fast Fourier transforms for scalable and efficient signal processing</p>
<p><strong>Article References:</strong> Xiao, T. P., Feinberg, B., Richardson, D. K., Cannon, M., Madsen, C., Medu, H., Agrawal, V., Marinella, M. J., Agarwal, S., &amp; Bennett, C. H. (2026). Analogue fast Fourier transforms for scalable and efficient signal processing. <em>Nature Electronics</em>. <a href="https://doi.org/10.1038/s41928-026-01725-x" rel="noopener noreferrer">https://doi.org/10.1038/s41928-026-01725-x</a></p>
<p><strong>Image Credits:</strong> AI Generated</p>
<p><strong>DOI:</strong> <a href="https://doi.org/10.1038/s41928-026-01725-x" rel="noopener noreferrer">10.1038/s41928-026-01725-x</a></p>
<p><strong>Keywords:</strong> analogue computing, in-memory computing, fast Fourier transform, SONOS memory, signal processing, edge devices, Nature Electronics, Sandia National Laboratories, non-volatile memory, energy efficiency, synthetic aperture radar, charge-trapping memory</p>
]]></content:encoded>
					
		
		
		<post-id xmlns="com-wordpress:feed-additions:1">313849</post-id>	</item>
	</channel>
</rss>
