Delving into the methodology, the team expertly utilized in situ domain engineering coupled with controllable direct chemical vapor deposition (CVD) techniques. This innovative approach allows for the careful modulation of defect structures at the domain level, a previously elusive achievement in the synthesis of homojunctions. By conducting theoretical simulations, researchers identified optimal intrinsic defect configurations, paving the way for their experimental implementation.

The CVD process was intricately designed in two distinct phases. Initially, the researchers established two types of growth domains within hexagonal WS2 samples under equilibrium conditions. This strategy not only facilitated the growth of the material but also ensured a precise control over the structural characteristics that would ultimately influence the device’s performance.

In the subsequent phase, the researchers undertook an in situ manipulation of the atomic configurations specific to each domain. This critical step aimed at engineering the electronic band structures of the resulting homojunctions, which play a pivotal role in determining their electronic properties and overall functionality. By exploiting van der Waals interactions and lateral atomic bonding, they succeeded in integrating these structures without damaging their integrity.

A notable aspect of this work is the researchers’ foresight in controlling the epitaxial growth process itself. By manipulating the precursor feeding rates of tungsten trioxide and sulfur, they created a state of equilibrium that allowed the growth rate of S-zigzag edges to match that of W-zigzag edges. This nuanced control mechanism is essential for tailoring the properties of the homojunctions, ensuring that they exhibit desired characteristics while maintaining atomic precision.

The resulting WS2 homojunctions demonstrated a remarkable array of field-effect characteristics, standing out due to their impressive overlapping lattice match and customized band alignment at the interfaces. Such precision in engineering has significant implications for the future of electronic devices, where the performance hinges on the quality of the materials used.

One of the practical applications of these synthesized structures is the development of logic inverters. The research highlights that these inverters achieved rail-to-rail operation, delivering a peak voltage gain of up to 12. Moreover, the dynamic delay measured around 135 microseconds showcases the swift response times achievable with these new materials. Most impressively, the power consumption was recorded at a mere 1.3 nanowatts, underscoring the efficiency and sustainability of these systems.

Beyond the immediate implications for electronic applications, the study provides deeper insights into the realm of two-dimensional materials. It sheds light on the significance of defect engineering within atomic layers and the effect these configurations have on the performance of low-dimensional devices. This knowledge could pave the way for future innovations in material science, culminating in the realization of advanced devices that outperform current technologies.

Additionally, the researchers have positioned their findings within the broader context of semiconductor technology. As industries worldwide seek alternatives to traditional silicon-based systems, the development of semiconductors that operate efficiently at the atomic level is becoming critical. This study represents a crucial step in that direction and ignites further exploration into the untapped potential of monolayer materials for a new generation of electronics.

Furthermore, this research emphasizes the importance of interdisciplinary collaboration, bringing together theoretical insights and practical experimentation. The successful synthesis of monolayer WS2 homojunctions is not solely a victory for material science but also reflects advancements in chemical engineering and nanotechnology, opening up avenues for educational initiatives and collaborative projects across institutions.

In conclusion, the synthesis of monolayer WS2 lateral homojunctions heralds a new era in the landscape of electronic materials. The ability to engineer defect structures and manipulate them in subsequent growth phases sets a precedent for future research endeavors aiming to push the boundaries of what is possible with two-dimensional materials. As researchers continue to explore the potential of these materials, the implications for the electronics industry are immense, promising a future where advanced, efficient, and sustainable devices become the norm.

Subject of Research: Monolayer WS2 lateral homojunctions synthesis
Article Title: USTC Reports Epitaxy Growth of Semiconducting Monolayer WS2 Lateral Homojunctions
News Publication Date: 13-Jun-2025
Web References: https://doi.org/10.1021/jacs.5c04546
References: 10.1021/jacs.5c04546
Image Credits: Image by USTC

Keywords

Monolayers, Transition Metal Dichalcogenides, Epitaxy Growth, Field-Effect Transistors, Defect Engineering, Chemical Vapor Deposition, Electronic Devices, 2D Materials.

Silicon’s dominance in the semiconductor industry is underpinned by decades of technological refinement centered around miniaturization, yet inevitable scaling challenges—ranging from short-channel effects to heat dissipation—have spurred the search for novel materials and architectures. Two-dimensional materials such as molybdenum disulfide (MoS₂) and tungsten diselenide (WSe₂) offer compelling advantages, including atomically thin channels ideal for electrostatic control and high carrier mobilities that surpass silicon in certain contexts. Yet, integrating these materials into complementary logic circuits, essential for power-efficient and high-performance digital electronics, has remained a significant hurdle, primarily due to difficulties in wafer-scale synthesis, doping control, and contact engineering.

Addressing these challenges head-on, the team engineered a CMOS platform by heterogeneously integrating large-area n-type MoS₂ and p-type WSe₂ field-effect transistors (FETs). This heterogeneous approach leverages the unique electronic properties of each material, enabling effective complementary operation. To optimize device performance, careful scaling of channel length and the adoption of a high-κ gate dielectric material were implemented. These design strategies were crucial for tailoring threshold voltages across both n-type and p-type transistors, ensuring that the devices operate efficiently and minimize leakage currents, which are detrimental to power consumption and overall circuit stability.

A key achievement of this research lies in the demonstration of robust device characteristics at scaled dimensions. Through precise material growth protocols and meticulous postprocessing techniques, the researchers attained transistor configurations that deliver high drive currents while suppressing subthreshold leakage. This balance is vital since the drive current dictates the switching speed and processing capability, whereas leakage currents impact power efficiency—a central consideration for any scalable semiconductor technology aiming to compete with established silicon processes.

The integrated 2D CMOS circuits exhibited functional operation below 3 volts, a testament to the meticulous engineering of device interfaces and gating architectures. The realized circuits achieved switching frequencies reaching up to 25 kHz, an impressive figure constrained predominantly by parasitic capacitances inherent in the device layout and fabrication processes. Although this frequency lags behind silicon microprocessors, it represents a pioneering proof of concept that validates the viability of 2D materials in practical computational hardware.

Noteworthy is the remarkably low power consumption observed in the 2D OISC system, operating in the picowatt range, coupled with energy-per-switching-event as low as approximately 100 picojoules. Such ultra-low power characteristics are highly desirable for applications demanding energy efficiency, including wearable electronics, implantable biomedical devices, and ubiquitous sensor networks. In these contexts, the ability to perform computations without significant power overhead could enable a new class of persistent, autonomous systems.

The authors did not stop at experimental demonstration. They further developed a comprehensive SPICE-compatible BSIM-BULK model calibrated with empirical device data, including variability across multiple transistor samples. By incorporating these realistic device-to-device variations, the modeling efforts provided invaluable insights into the scalability and practical performance bounds of the 2D material-based CMOS circuits. When benchmarked against state-of-the-art silicon microelectronics, the projections suggest that while current performance does not yet rival traditional silicon solutions, continuous material and processing improvements could close this gap, heralding a new era of 2D electronics.

This study epitomizes the complex interplay between advanced materials synthesis, device physics, and circuit design. Achieving complementary operation with two distinct 2D semiconductors required overcoming numerous technical barriers, including uniform wafer-scale crystal growth, controllable doping levels, and the formation of low-resistance, thermally stable contacts. The successful co-integration of n-type MoS₂ and p-type WSe₂ FETs on a common substrate signals a critical step toward scalable manufacturing processes compatible with existing silicon fab infrastructure.

From a broader perspective, this advance invites a reevaluation of long-standing paradigms in semiconductor technology, particularly as industry demands increasingly push beyond silicon’s fundamental limits. The ability to engineer and integrate atomically thin materials at wafer scale opens exciting frontiers not only for logic electronics but also for optoelectronics, flexible devices, and sensors. The modularity of 2D materials offers tantalizing prospects for heterogeneous integration with other emerging platforms, potentially fostering hybrid architectures that leverage the best attributes of multiple material systems.

Importantly, the research highlights the practical significance of device variability and interface engineering in 2D electronics. The authors’ approach in modeling and benchmarking accounts for real-world nonidealities, which is essential to translating lab-scale breakthroughs into industrial applications. Furthermore, the adopted high-κ gate dielectric, alongside efforts in threshold voltage tuning, illustrates how traditional semiconductor engineering principles must be adapted and refined for atomically thin materials.

The prototype one instruction set computer implemented in this work embodies a minimalist yet fully functional computing architecture, which, despite its simplicity, demonstrates the essential building blocks of digital logic implemented through 2D semiconductor technology. Its successful operation at ultra-low voltages and power levels underscores the inherent advantages of 2D materials for energy-efficient electronics while serving as a scalable platform for more complex integrated circuits.

While significant challenges remain —including improving operating frequency, enhancing device uniformity, and integrating with complementary fabrication techniques—the demonstrated system forms a pivotal foundation for future explorations in 2D microelectronics. It sparks optimism within the scientific community, signifying that 2D material-based complementary circuits may soon transition from academic curiosities to practical technologies integrated into everyday electronic devices.

In summation, the work by Ghosh and colleagues not only affirms the potential of 2D materials as viable alternatives to silicon in CMOS logic but also represents a landmark in the field’s evolution. By successfully synthesizing, engineering, and integrating large-area MoS₂ and WSe₂ transistors into a functional computing architecture, they have illuminated a promising path forward for the semiconductor industry. With continued research and development, the vision of ultra-scaled, energy-efficient 2D material-based microprocessors may well materialize, radically reshaping the landscape of electronics.

Subject of Research: Complementary CMOS circuits based on two-dimensional n-type MoS₂ and p-type WSe₂ field-effect transistors for logic computing.

Article Title: A complementary two-dimensional material-based one instruction set computer.

Article References:
Ghosh, S., Zheng, Y., Rafiq, M. et al. A complementary two-dimensional material-based one instruction set computer. Nature 642, 327–335 (2025). https://doi.org/10.1038/s41586-025-08963-7

Image Credits: AI Generated

DOI: https://doi.org/10.1038/s41586-025-08963-7