<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:wfw="http://wellformedweb.org/CommentAPI/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	xmlns:atom="http://www.w3.org/2005/Atom"
	xmlns:sy="http://purl.org/rss/1.0/modules/syndication/"
	xmlns:slash="http://purl.org/rss/1.0/modules/slash/"
	>

<channel>
	<title>nanoelectronics &#8211; Science</title>
	<atom:link href="https://scienmag.com/tag/nanoelectronics/feed/" rel="self" type="application/rss+xml" />
	<link>https://scienmag.com</link>
	<description></description>
	<lastBuildDate>Tue, 13 Oct 2026 09:01:35 +0000</lastBuildDate>
	<language>en-US</language>
	<sy:updatePeriod>
	hourly	</sy:updatePeriod>
	<sy:updateFrequency>
	1	</sy:updateFrequency>
	<generator>https://wordpress.org/?v=7.1.3</generator>

<image>
	<url>https://scienmag.com/wp-content/uploads/2024/07/cropped-scienmag_ico-32x32.jpg</url>
	<title>nanoelectronics &#8211; Science</title>
	<link>https://scienmag.com</link>
	<width>32</width>
	<height>32</height>
</image> 
<site xmlns="com-wordpress:feed-additions:1">73899611</site>	<item>
		<title>Graph Entropy Reveals Hidden Order in Hyper Carbon Nanotubes</title>
		<link>https://scienmag.com/graph-entropy-reveals-hidden-order-in-hyper-carbon-nanotubes/</link>
		
		<dc:creator><![CDATA[Denise Maddox]]></dc:creator>
		<pubDate>Tue, 13 Oct 2026 09:01:35 +0000</pubDate>
				<category><![CDATA[Technology and Engineering]]></category>
		<category><![CDATA[branched carbon nanotube architectures]]></category>
		<category><![CDATA[carbon nanotubes]]></category>
		<category><![CDATA[chemical graph theory]]></category>
		<category><![CDATA[degree-based indices]]></category>
		<category><![CDATA[fractal-like nanoscale networks]]></category>
		<category><![CDATA[graph entropy]]></category>
		<category><![CDATA[graph entropy in nanostructures]]></category>
		<category><![CDATA[graph theory in nanomaterials]]></category>
		<category><![CDATA[hyper armchair carbon nanotubes]]></category>
		<category><![CDATA[hyper carbon nanotubes]]></category>
		<category><![CDATA[hypergraph modeling of nanotubes]]></category>
		<category><![CDATA[multi-terminal nanoscale interconnects]]></category>
		<category><![CDATA[nanocomposite connectivity]]></category>
		<category><![CDATA[nanoelectronics]]></category>
		<category><![CDATA[nanoscale interconnects]]></category>
		<category><![CDATA[predictive analysis of nanotube structures]]></category>
		<category><![CDATA[Scientific Reports]]></category>
		<category><![CDATA[Shannon entropy]]></category>
		<category><![CDATA[structural complexity quantification]]></category>
		<category><![CDATA[topological indices]]></category>
		<category><![CDATA[Y-shaped junctions]]></category>
		<category><![CDATA[Y-shaped junctions in nanotechnology]]></category>
		<category><![CDATA[Zagreb indices]]></category>
		<guid isPermaLink="false">https://scienmag.com/?p=267283</guid>

					<description><![CDATA[Researchers have derived closed-form entropy measures of degree-based topological indices for hyper armchair carbon nanotubes, showing that entropy rises with structural complexity and that a dominant degree class drives different indices to converge for larger graphs.]]></description>
										<content:encoded><![CDATA[<p>Carbon nanotubes have long been celebrated as one of the most versatile building blocks in modern nanotechnology, finding roles in nanoelectronics, molecular sensors, energy-storage devices, nanocomposites, and multi-terminal nanoscale interconnects. Yet as researchers push beyond simple cylindrical tubes toward more elaborate architectures, a pressing question emerges: how can we quantify the structural complexity of these exotic materials in a rigorous, predictive way? A new study published in Scientific Reports by Muhammad Faisal Nadeem, Ayesha Shabbir, Mohamad Nazri Husin, and Yuslenita Muda tackles exactly this problem, using the mathematical language of graph entropy to dissect a novel class of structures known as hyper armchair carbon nanotubes.</p>
<p>The structures at the heart of the study, abbreviated HCN graphs, are not ordinary nanotubes. Instead of a simple honeycomb lattice of carbon atoms, a hyper armchair carbon nanotube is constructed by replacing every vertex of an armchair nanotube template with a Y-shaped junction module, and every edge of the template with an armchair nanotube segment. The result is a branched, fractal-like network that resembles a nanoscale plumbing system with junctions at every node. Such architectures are of genuine practical interest, because Y-shaped junctions are precisely the kind of connectivity needed for multi-terminal interconnects in nanoscale circuits, where a single conducting channel must split into two or more branches.</p>
<p>To analyze these structures, the authors turned to degree-based topological indices, a family of numerical descriptors that condense the connectivity pattern of a molecular graph into a single number. In a graph representation of a nanotube, vertices correspond to atoms or junction modules and edges correspond to bonds or connecting segments. The degree of a vertex is simply the number of edges meeting at it. Classic degree-based indices, such as the first and second Zagreb indices, sum quantities like the squares of vertex degrees or products of degrees across edges, and decades of research in chemical graph theory have shown that these numbers correlate with physicochemical properties ranging from boiling points to electronic band structures.</p>
<p>However, a single index number can hide as much as it reveals. Two very different graphs can share the same Zagreb index, and a lone descriptor says nothing about how evenly the structural information is distributed across the network. This is where entropy enters the picture. By adapting Shannon&#8217;s celebrated information-theoretic entropy measure to topological indices, researchers can quantify not just the total value of an index but the diversity of its contributions across all edges of the graph. A high entropy value signals that the index contributions are spread evenly among many different edge types, while a low entropy value indicates that a small subset of edges dominates the descriptor.</p>
<p>The methodological core of the paper lies in establishing complete vertex-degree partitions and vertex-degree-based edge partitions for the HCN graph. In plain terms, the authors sorted every vertex and every edge of the hyper nanotube into classes according to the degrees of their endpoints, and then verified that these classifications were exhaustive and consistent with the graph&#8217;s fundamental invariants: its order (the number of vertices), its size (the number of edges), and the degree-sum identity, which requires that the sum of all vertex degrees equals twice the number of edges. This verification step is far from a formality; incorrect partitions are a common source of errors in the chemical graph theory literature, and the authors&#8217; careful cross-checking lends the resulting formulas a solid foundation.</p>
<p>With the partitions in hand, the team derived closed-form expressions for the selected topological indices of HCN graphs, meaning exact formulas that depend only on the structural parameters of the nanotube rather than on laborious edge-by-edge counting. They then normalized the edge contributions of each index to obtain the corresponding Shannon entropies. Closed forms are particularly valuable because they allow researchers to predict how entropy behaves as a hyper nanotube grows, without recomputing anything from scratch for each new size.</p>
<p>The numerical comparisons reported in the study reveal a clear and somewhat elegant trend: the entropy values of the selected degree-based indices increase along the sequence of structural parameters. In other words, as hyper armchair carbon nanotubes become larger or more complex, the contributions of individual edges to each topological index become more evenly distributed across the network. The graph, in an information-theoretic sense, becomes more democratic as it grows.</p>
<p>Even more illuminating is the explanation the authors offer for a related observation: the entropy values of different indices converge and become close for larger HCN graphs. The culprit is the dominant degree class. In a hyper nanotube, the Y-shaped junction modules and the connecting armchair segments create a degree distribution in which one particular class of edges vastly outnumbers all others. As the graph expands, this dominant class accounts for an ever-larger fraction of all edges, so every degree-based index, regardless of its precise mathematical definition, draws the overwhelming majority of its contribution from the same pool of edges. When normalized into entropies, the indices therefore converge toward similar values, a phenomenon the authors trace directly to the structure of the degree partitions.</p>
<p>This convergence has practical implications for anyone using topological indices to screen nanomaterials. It suggests that for very large hyper nanotubes, the choice among popular degree-based indices may matter less than one might expect, since their entropy profiles become nearly indistinguishable. Conversely, for smaller structures, where the degree classes are more balanced, different indices can yield genuinely different entropy values, making the choice of descriptor more consequential. Researchers designing Y-junctioned nanotube interconnects or hierarchical nanocomposites could use these entropy measures as a diagnostic of structural heterogeneity, complementing traditional indices that capture only aggregate information.</p>
<p>The study, which received funding support from Universiti Malaysia Terengganu, exemplifies a broader trend in which information theory and chemical graph theory join forces to make sense of increasingly intricate nanostructures. As synthetic chemistry gains the ability to assemble ever more elaborate carbon architectures, mathematical tools that can distill their complexity into interpretable, comparable numbers will only grow in importance. For hyper carbon nanotubes, entropy measures of degree-based topological indices now offer exactly that: a rigorous yardstick for the hidden order within branching nanoscale networks, and a reminder that sometimes the most revealing properties of a material are found not in its atoms, but in the abstract pattern of their connections.</p>
<p><strong>Subject of Research:</strong> Entropy measures of degree-based topological indices for hyper armchair carbon nanotube graphs</p>
<p><strong>Article Title:</strong> Entropy measures of degree-based topological indices for hyper carbon nanotubes</p>
<p><strong>Article References:</strong> Nadeem, M. F., Shabbir, A., Husin, M. N., &amp; Muda, Y. (2026). Entropy measures of degree-based topological indices for hyper carbon nanotubes. <em>Scientific Reports</em>. <a href="https://doi.org/10.1038/s41598-026-73730-1" rel="noopener noreferrer">https://doi.org/10.1038/s41598-026-73730-1</a></p>
<p><strong>Image Credits:</strong> AI Generated</p>
<p><strong>DOI:</strong> <a href="https://doi.org/10.1038/s41598-026-73730-1" rel="noopener noreferrer">10.1038/s41598-026-73730-1</a></p>
<p><strong>Keywords:</strong> carbon nanotubes, hyper carbon nanotubes, graph entropy, topological indices, degree-based indices, Zagreb indices, Y-shaped junctions, Shannon entropy, chemical graph theory, nanoelectronics, nanoscale interconnects, Scientific Reports</p>
]]></content:encoded>
					
		
		
		<post-id xmlns="com-wordpress:feed-additions:1">267283</post-id>	</item>
		<item>
		<title>Quantum-Dot Memory Cells Shrink to the Nanoscale in New QCA Design</title>
		<link>https://scienmag.com/quantum-dot-memory-cells-shrink-to-the-nanoscale-in-new-qca-design/</link>
		
		<dc:creator><![CDATA[Katie Riggs]]></dc:creator>
		<pubDate>Sun, 11 Oct 2026 06:52:31 +0000</pubDate>
				<category><![CDATA[Technology and Engineering]]></category>
		<category><![CDATA[alternative computing paradigms beyond CMOS]]></category>
		<category><![CDATA[atomic-scale device fabrication]]></category>
		<category><![CDATA[CMOS]]></category>
		<category><![CDATA[Coulombic interactions in QCA]]></category>
		<category><![CDATA[D-latch]]></category>
		<category><![CDATA[digital revolution hardware evolution]]></category>
		<category><![CDATA[heat dissipation in microelectronics]]></category>
		<category><![CDATA[latency]]></category>
		<category><![CDATA[limitations of traditional transistors]]></category>
		<category><![CDATA[majority gate]]></category>
		<category><![CDATA[memory design]]></category>
		<category><![CDATA[nanoelectronics]]></category>
		<category><![CDATA[nanoscale memory circuits]]></category>
		<category><![CDATA[nanoscale quantum-dot cellular automata]]></category>
		<category><![CDATA[post-transistor computing technologies]]></category>
		<category><![CDATA[power dissipation]]></category>
		<category><![CDATA[QCA]]></category>
		<category><![CDATA[QCADesigner]]></category>
		<category><![CDATA[QCAPro]]></category>
		<category><![CDATA[quantum-dot cell operation]]></category>
		<category><![CDATA[Quantum-dot Cellular Automata]]></category>
		<category><![CDATA[quantum-dot cellular automata memory design]]></category>
		<category><![CDATA[Quantum-dot memory cells]]></category>
		<category><![CDATA[SRAM]]></category>
		<guid isPermaLink="false">https://scienmag.com/?p=261494</guid>

					<description><![CDATA[Researchers in India have designed ultra-compact quantum-dot cellular automata memory circuits, including a 14-cell D-latch and a SET/RESET-enabled SRAM cell, that promise lower power and latency than conventional approaches.]]></description>
										<content:encoded><![CDATA[<p>For decades, the engine of the digital revolution has been the relentless shrinking of the transistor. But as silicon devices approach atomic dimensions, the industry is confronting a hard physical wall: transistors can no longer be made smaller without leaking current, dissipating heat, and losing reliability. A new study published in Scientific Reports by Priyanka Wani and Sankit Kassa of Symbiosis Institute of Technology in Pune, India, offers a glimpse of what might come after the transistor era. The researchers have designed and verified two remarkably compact memory circuits based on quantum-dot cellular automata, a computing paradigm that abandons the flow of electric current altogether and encodes information instead in the position of single electrons within nanoscale cells.</p>
<p>Quantum-dot cellular automata, or QCA, is one of the most actively explored alternatives to complementary metal–oxide–semiconductor technology, the CMOS framework that underpins virtually every chip manufactured today. In a QCA circuit, the basic unit is a square cell containing four quantum dots, with two mobile electrons that tend to occupy diagonally opposite dots. Because there are two possible diagonal arrangements, each cell can represent a binary one or a binary zero. Information propagates not through wires carrying current but through Coulombic interactions: the electron configuration of one cell influences its neighbor, and arrays of cells can be arranged to perform logic operations. The result is a technology that promises switching speeds in the terahertz range, feature sizes at the molecular scale, and power consumption orders of magnitude below conventional electronics.</p>
<p>The centerpiece of the new work is a D-latch, a fundamental building block of digital memory that holds a single bit of data as long as an enable signal remains active. Latches are the precursors to flip-flops and registers, and any practical QCA-based processor would need thousands of them. Wani and Kassa&#8217;s design uses a majority-feedback architecture, exploiting the majority gate that serves as the native logic primitive of QCA. A majority gate outputs the value held by the majority of its three inputs, and by feeding the output back into one of the inputs, the circuit can hold its state indefinitely, which is precisely the behavior required of a latch. The elegance of this approach lies in its economy: instead of assembling latches from many separate logic gates, the feedback structure folds the storage function into a small cluster of cells.</p>
<p>The numbers reported in the study are striking. The optimized D-latch requires only 14 QCA cells arranged in a single layer and occupies a footprint of just 0.007 square micrometers. Single-layer designs are particularly valuable because multi-layer QCA fabrication, which stacks cells above one another, remains one of the most difficult manufacturing challenges facing the technology. By keeping everything on one plane, the researchers sidestep a major engineering bottleneck. Compared with a similar latch previously reported in the literature, the new circuit reduces the layout area, the latency, and the overall QCA cost, a composite metric that combines cell count, wire crossings, and the area consumed by the design.</p>
<p>Latency matters as much as area in memory design. In QCA, information ripples through the cell array one clock zone at a time, so the number of clock zones a signal must traverse determines how quickly the circuit responds. Each clocking zone in a QCA layout is driven by a four-phase clock that pumps information forward, and every additional zone adds delay and switching energy. By carefully arranging cells to minimize the critical path, the researchers produced a latch that settles to its stored value with fewer clock cycles than competing designs. For memory arrays, where read and write operations occur billions of times per second, such savings compound into significant gains in throughput and efficiency.</p>
<p>The second contribution of the paper addresses a practical requirement of real memory systems: the ability to deliberately overwrite stored data. The researchers extended their latch into a 15-cell variant equipped with SET and RESET control signals, making it suitable for use as a static random-access memory cell. In conventional SRAM, each bit is stored in a cross-coupled pair of inverters that can be written and read through access transistors. The QCA equivalent achieves the same function through its majority-feedback structure, with the SET and RESET inputs allowing the cell to be forced into a known state regardless of what was previously stored. This control capability is essential for initializing memory, clearing registers, and implementing the write operations that random-access memory demands.</p>
<p>Power analysis revealed another advantage of the SET/RESET-enabled design. Using QCAPro, a simulation tool that models the thermodynamic behavior of QCA circuits, the researchers mapped the energy dissipation and polarization characteristics of both circuits. The 15-cell memory cell was found to reduce peak energy dissipation by approximately 22 percent relative to the 14-cell baseline latch. This counterintuitive result, in which an additional cell yields lower peak power, reflects the way control signals can steer the circuit through lower-energy switching paths. In a technology whose central promise is ultra-low power consumption, trimming energy at the level of individual memory cells is a meaningful step toward practical nanoelectronic systems.</p>
<p>All designs were implemented and functionally verified in QCADesigner version 2.0.3, the standard simulation environment for QCA research. Functional verification confirms that the circuits produce the correct logical outputs across their input space, while the power and polarization analyses in QCAPro provide a window into the physical behavior of the electrons within each cell. This combination of logic-level and energy-level simulation is the accepted methodology in the QCA community for evaluating whether a proposed circuit is not only logically correct but also physically plausible and energy-efficient. The study reports that both circuits performed as intended, validating the majority-feedback approach as a reliable template for memory elements.</p>
<p>The significance of this work extends beyond the specific circuits described. Memory is one of the most demanding tests of any candidate post-CMOS technology, because practical systems require enormous arrays of identical, reliable, low-power storage elements. Demonstrating a latch and an SRAM cell with minimal cell counts, single-layer layouts, and quantified energy savings provides a concrete data point in the ongoing comparison between QCA and incumbent technologies. If QCA is ever to move from simulation to fabrication at scale, designs like these, which minimize the number of cells and avoid multi-layer complexity, will define the benchmarks that manufacturing processes must meet.</p>
<p>Considerable challenges remain before quantum-dot cellular automata can challenge silicon in commercial products. Fabricating and clocking arrays of quantum dots with the required precision, maintaining coherence at room temperature, and integrating millions of cells are problems that no laboratory has yet solved. But each incremental improvement in circuit density, latency, and power efficiency brings the field closer to viability. Wani and Kassa&#8217;s optimized latch and memory cell, published as open-access research with a permanent DOI, add to a growing library of compact QCA primitives that future designers can assemble into larger systems. As CMOS scaling slows, such foundational work on alternative computing substrates may prove to be among the most consequential research of the coming decade.</p>
<p><strong>Subject of Research:</strong> Quantum-dot cellular automata memory circuit design for nanoelectronics</p>
<p><strong>Article Title:</strong> An optimized majority-feedback QCA D-latch and SET/RESET-enabled SRAM cell for compact, low-latency nanoelectronic memory design</p>
<p><strong>Article References:</strong> Wani, P., &amp; Kassa, S. (2026). An optimized majority-feedback QCA D-latch and SET/RESET-enabled SRAM cell for compact, low-latency nanoelectronic memory design. <em>Scientific Reports</em>. <a href="https://doi.org/10.1038/s41598-026-74675-1" rel="noopener noreferrer">https://doi.org/10.1038/s41598-026-74675-1</a></p>
<p><strong>Image Credits:</strong> AI Generated</p>
<p><strong>DOI:</strong> <a href="https://doi.org/10.1038/s41598-026-74675-1" rel="noopener noreferrer">10.1038/s41598-026-74675-1</a></p>
<p><strong>Keywords:</strong> quantum-dot cellular automata, QCA, nanoelectronics, SRAM, D-latch, memory design, power dissipation, latency, CMOS, majority gate, QCADesigner, QCAPro</p>
]]></content:encoded>
					
		
		
		<post-id xmlns="com-wordpress:feed-additions:1">261494</post-id>	</item>
		<item>
		<title>Quantum Chaos Cannot Erase the Past: Physicists Uncover the &#8216;Quantum Birthmark&#8217; That Never Fades</title>
		<link>https://scienmag.com/quantum-chaos-cannot-erase-the-past-physicists-uncover-the-quantum-birthmark-that-never-fades/</link>
		
		<dc:creator><![CDATA[Katie Riggs]]></dc:creator>
		<pubDate>Sat, 10 Oct 2026 13:02:37 +0000</pubDate>
				<category><![CDATA[Chemistry]]></category>
		<category><![CDATA[chaos theory in quantum mechanics]]></category>
		<category><![CDATA[classical vs quantum chaos]]></category>
		<category><![CDATA[effects of chaos on quantum systems]]></category>
		<category><![CDATA[equilibration]]></category>
		<category><![CDATA[ergodicity breaking]]></category>
		<category><![CDATA[information preservation in quantum systems]]></category>
		<category><![CDATA[initial conditions in quantum physics]]></category>
		<category><![CDATA[irreversibility in quantum mechanics]]></category>
		<category><![CDATA[memory in quantum systems]]></category>
		<category><![CDATA[nanoelectronics]]></category>
		<category><![CDATA[Physical Review X]]></category>
		<category><![CDATA[Physical Review X study]]></category>
		<category><![CDATA[quantum birthmark]]></category>
		<category><![CDATA[quantum birthmarks]]></category>
		<category><![CDATA[quantum chaos]]></category>
		<category><![CDATA[quantum dynamics]]></category>
		<category><![CDATA[quantum scarring]]></category>
		<category><![CDATA[quantum system evolution]]></category>
		<category><![CDATA[quantum system unpredictability]]></category>
		<category><![CDATA[quantum-to-classical transition]]></category>
		<category><![CDATA[stadium billiards]]></category>
		<category><![CDATA[Tampere University]]></category>
		<category><![CDATA[wave packets]]></category>
		<guid isPermaLink="false">https://scienmag.com/?p=258714</guid>

					<description><![CDATA[Physicists at Tampere University, Harvard, and TU Dresden have shown that even maximally chaotic quantum systems retain a permanent 'quantum birthmark' of their initial conditions, generalizing quantum scarring into a universal form of ergodicity breaking with implications for nanoelectronics.]]></description>
										<content:encoded><![CDATA[<p>Stir a drop of milk into a cup of tea and watch it vanish. Within moments the swirl blurs, spreads, and evens out, and no amount of staring into the cup will ever tell you where the drop first landed. Physicists call this memory-erasing unpredictability chaos, and it underpins much of how we explain the everyday world: heat spreading through a room, smoke curling through still air, a pinball rattling away from wherever it was launched. In classical physics, chaos is the great eraser. It wipes the slate clean, scrambling any trace of initial conditions until only statistical sameness remains. For nearly a century, researchers assumed that quantum mechanics, once it was stirred hard enough, would follow the same script. A new study shows that it does not. Even in the middle of chaos, quantum systems cannot hide where they came from.</p>
<p>Researchers from Tampere University, Harvard University, and TU Dresden have discovered that even the most chaotic quantum systems keep a permanent mark of their own past, a feature the team describes as a &#8220;quantum birthmark&#8221; that never fades. The findings, published in the journal Physical Review X, shed new light on one of the most elusive relationships in physics: the tension between the chaotic, forgetful classical world we inhabit and the quantum-mechanical rules that lie beneath it. &#8220;In the everyday world, chaos wipes the slate clean. What we found is that quantum systems can&#8217;t hide their origin, even in the middle of chaos,&#8221; says Dr. Joonas Keski-Rahkonen, a researcher in the Quantum Control and Dynamics group at Tampere University&#8217;s Computational Physics Laboratory and one of the study&#8217;s lead authors.</p>
<p>To expose this lingering memory, the team turned to one of physics&#8217; most venerable testing grounds: the quantum stadium billiard. Imagine a ball bouncing endlessly around a table with curved walls, ricocheting off in a new direction every time, like a billiard table with rounded ends. In the classical version of this game, chaos reigns absolutely. If you track the ball long enough, it will have visited every part of the table with equal frequency, and no hint of its starting point will survive. Physicists call this property ergodicity, the tendency of a chaotic system to explore all available states impartially, forgetting its own history along the way. It is the mathematical backbone of why a gas in a box settles into a uniform state and why statistical mechanics works at all.</p>
<p>But quantum objects do not behave like billiard balls. They behave more like ripples spreading across a water surface, and what a physicist can actually determine is not a definite position but the probability of finding the particle here rather than there. When the researchers set such a quantum ripple, formally known as a wave packet, loose inside the stadium, it scrambled within moments into what appears at any single instant to be a completely random pattern, indistinguishable from noise. The eye sees nothing but disorder. The birthmark hides beneath the surface.</p>
<p>The crucial move was to stop looking at snapshots and instead average the apparently featureless motion over very long stretches of time. That averaging revealed a clear and stubborn bias toward the system&#8217;s own early history: the wave packet remained at least twice as likely to be found back in its original condition as in any other comparable configuration. Most strikingly, this partiality does not diminish. It persists for as long as the system remains quantum, defying the expectation that sufficiently chaotic dynamics must eventually dilute every trace of initial conditions. In the language of the field, the birthmark represents a form of ergodicity breaking, a failure of the long-time averaging that classical chaos demands, and it appears not as a rare curiosity but as a universal property of quantum evolution.</p>
<p>The discovery reframes a phenomenon that has intrigued physicists for four decades. In 1984, Eric Heller, a professor at Harvard University and co-author of the new study, found that quantum systems sometimes retain surprisingly sharp imprints of repeating classical paths, an anomaly he named quantum scarring. In scarred systems, certain unstable trajectories act like ghostly guides, concentrating probability density along their outlines long after chaos should have smeared everything into uniformity. For generations, scarring was treated as a beautiful but exceptional breakdown of quantum chaos, a special case confined to particular systems and particular energies. The new work establishes that scarring is just the most visible expression of something universal: every quantum system, however chaotic its classical counterpart, carries a birthmark from its own beginnings. The scar is the symptom; the birthmark is the diagnosis.</p>
<p>The technical heart of the result lies in how the team quantified memory. Rather than measuring whether the wave packet ever returns to its starting configuration, which any finite quantum system will occasionally do by chance, the researchers examined the infinite-time average of the survival probability across the system&#8217;s states, effectively asking how much of the initial condition is permanently embedded in the long-run statistics of the motion. In a perfectly ergodic quantum system, that embedding should vanish, with the average spreading evenly across all available states regardless of origin. Instead, the measured bias toward the initial state remained finite and robust, at least a factor of two above the level that total forgetting would imply. This is a statement about the fundamental structure of quantum dynamics, not about practical limitations of measurement or decoherence.</p>
<p>The implications reach well beyond textbook physics. Quantum theory&#8217;s account of how isolated systems settle into equilibrium, and how our familiar classical world emerges from underlying quantum rules, has always had an awkward gap: the classical world forgets, while the quantum world apparently never quite does. The birthmark provides a precise handle on that gap. &#8220;That matters beyond textbook physics. It speaks to how quantum systems settle into equilibrium, and how our familiar classical world emerges from the quantum-mechanical rules,&#8221; Keski-Rahkonen says. &#8220;Moreover, quantum simulators and nanoscale electronics are nowadays small enough that these effects count. For instance, it matters that a system which quietly remembers its starting point behaves differently from one that forgets.&#8221;</p>
<p>That last point is where the research turns from foundational to technological. Modern nanoscale devices, quantum simulators, and engineered electronic structures operate in regimes so small and so coherent that quantum memory effects are no longer negligible background details but active players in device behavior. A nanoscale conductor whose electrons retain a fingerprint of where they were injected will transport current differently from one whose electrons have fully forgotten. The researchers point toward harnessing these quantum birthmarks, together with the related phenomenon of scarring, as design principles for next-generation nanoelectronics, potentially allowing engineers to control transport and dynamics by deliberately imprinting or erasing initial-state memory. The same generality that makes the birthmark a foundational discovery makes it a candidate resource: if every quantum system remembers, memory becomes something that can be shaped.</p>
<p>Keski-Rahkonen says the team now aims to turn the discovery into a general framework for asking how much of its own history any quantum system can truly forget, a question that touches statistical mechanics, quantum information, and the emergence of classicality. The study, titled &#8220;Quantum Birthmarks: Ergodicity Breaking Beyond Scarring,&#8221; was published in Physical Review X and highlighted in a feature article in the American Physical Society&#8217;s magazine Physics. What began as a paradox glimpsed in 1984, a few ghostly scars on the face of chaos, has now matured into a universal principle: in the quantum realm, the past is never fully erased. Stir the milk as long as you like; somewhere in the swirl of probability, the memory of where it landed endures.</p>
<p><strong>Subject of Research:</strong> Permanent memory of initial conditions in chaotic quantum systems</p>
<p><strong>Article Title:</strong> Quantum systems never quite forget where they came from</p>
<p><strong>Article References:</strong> Quantum systems never quite forget where they came from. (n.d.). <a href="https://www.eurekalert.org/news-releases/1146482" rel="noopener noreferrer">Original publication</a></p>
<p><strong>Image Credits:</strong> AI Generated</p>
<p><strong>DOI:</strong> Not provided</p>
<p><strong>Keywords:</strong> quantum chaos, quantum birthmarks, quantum scarring, ergodicity breaking, wave packets, stadium billiards, quantum-to-classical transition, equilibration, nanoelectronics, Physical Review X, quantum dynamics, Tampere University</p>
]]></content:encoded>
					
		
		
		<post-id xmlns="com-wordpress:feed-additions:1">258714</post-id>	</item>
		<item>
		<title>Oxygen Trick Yields First Uniform Semiconducting Monolayer PtSe2 Films for Transistors</title>
		<link>https://scienmag.com/oxygen-trick-yields-first-uniform-semiconducting-monolayer-ptse2-films-for-transistors/</link>
		
		<dc:creator><![CDATA[Denise Maddox]]></dc:creator>
		<pubDate>Sat, 26 Sep 2026 21:16:31 +0000</pubDate>
				<category><![CDATA[Technology and Engineering]]></category>
		<category><![CDATA[2D material bandgap engineering]]></category>
		<category><![CDATA[advanced 2D semiconductor device performance]]></category>
		<category><![CDATA[atomically thin semiconductor fabrication]]></category>
		<category><![CDATA[bandgap engineering]]></category>
		<category><![CDATA[chemical vapor deposition for 2D materials]]></category>
		<category><![CDATA[crystallography]]></category>
		<category><![CDATA[defect-free 2D film production]]></category>
		<category><![CDATA[field-effect transistor]]></category>
		<category><![CDATA[field-effect transistors with 2D materials]]></category>
		<category><![CDATA[industrial scale 2D material synthesis]]></category>
		<category><![CDATA[large-area 2D semiconductor films]]></category>
		<category><![CDATA[layer-dependent electronic properties of PtSe2]]></category>
		<category><![CDATA[MOCVD]]></category>
		<category><![CDATA[monolayer semiconductor]]></category>
		<category><![CDATA[nanoelectronics]]></category>
		<category><![CDATA[oxygen-assisted growth]]></category>
		<category><![CDATA[platinum diselenide transistors]]></category>
		<category><![CDATA[PtSe2]]></category>
		<category><![CDATA[semiconductor manufacturing]]></category>
		<category><![CDATA[thin film growth]]></category>
		<category><![CDATA[transition metal dichalcogenides]]></category>
		<category><![CDATA[two-dimensional materials]]></category>
		<category><![CDATA[two-dimensional semiconductors]]></category>
		<category><![CDATA[uniform monolayer PtSe2 growth]]></category>
		<guid isPermaLink="false">https://scienmag.com/?p=216397</guid>

					<description><![CDATA[Researchers have grown the first uniform, large-area monolayer PtSe2 semiconductor films using an oxygen-assisted MOCVD process and built record-setting transistor arrays from them.]]></description>
										<content:encoded><![CDATA[<p>For more than a decade, the promise of two-dimensional semiconductors has been shadowed by a stubborn manufacturing problem: the best atomically thin materials are notoriously difficult to grow as large, uniform, defect-free films that actual devices can use. Now a research team in South Korea reports a breakthrough that could change that calculus for one of the most intriguing members of the two-dimensional family. Writing in Advanced Science, the researchers describe the first successful growth of a uniform, large-area monolayer of platinum diselenide (PtSe2) using metal-organic chemical vapor deposition, the workhorse technique of industrial chip fabrication. The film spans a 1.5 by 1.5 centimeter substrate, exhibits a clear semiconducting bandgap of roughly 1.5 electron volts, and has already been turned into an array of field-effect transistors that set new performance records for this material class.</p>
<p>The excitement around PtSe2 stems from a remarkable property: its electronic character depends dramatically on how many atomic layers are stacked together. A single layer behaves as a true semiconductor with a bandgap of about 1.2 to 1.5 electron volts. Add a second layer and the gap collapses to roughly 0.3 electron volts; a third layer pushes it below 0.1 electron volts; and by four layers the material has become a semi-metal with no gap at all. This steep transition arises from strong interlayer coupling, and it cuts both ways. On one hand, it means a single material can serve as both the semiconducting channel and the metallic electrode in an all-PtSe2 transistor. On the other, it makes thickness control absolutely unforgiving: even a stray bilayer island in an otherwise monolayer film creates a semi-metallic leak path that would ruin a transistor&#8217;s ability to switch off.</p>
<p>That unforgiving requirement is precisely why monolayer PtSe2 has eluded researchers for so long. Earlier attempts using thermally assisted conversion, powder-source chemical vapor deposition, or molecular beam epitaxy produced nonuniform multilayer films, tiny grains of only 10 to 20 nanometers, or multilayer flakes dotted with small monolayer patches. None of these could deliver the precise thickness control and wafer-scale uniformity that transistor manufacturing demands. The new work overcomes this barrier through two clever chemical innovations: a custom-designed platinum precursor and an unexpected growth partner, oxygen gas.</p>
<p>The precursor, Pt(dipivaloylmethane-sulfonate)2, was synthesized specifically for thermal stability, refusing to decompose until temperatures reach approximately 300 degrees Celsius, higher than any other platinum precursor available. That stability matters because in a typical metal-organic deposition process, precursors that break apart too easily in the gas phase release highly reactive fragments that nucleate particles in mid-air, raining uncontrolled defects onto the growing film. By keeping the precursor intact until it reaches the heated substrate, the team suppressed these gas-phase reactions entirely, allowing the film to assemble itself in an orderly, layer-by-layer fashion at a growth temperature of 470 degrees Celsius on muscovite mica substrates.</p>
<p>Oxygen played an equally decisive role, and here the choice of material proved fortuitous. Metal-organic precursors carry organic ligands that, if left behind on the substrate, contaminate the film with amorphous carbon and create unwanted nucleation sites that shrink grain size. Most two-dimensional semiconductors, such as molybdenum disulfide, would be damaged by oxygen during growth, but PtSe2 belongs to the noble-metal dichalcogenides, which possess a high energy barrier to oxygen dissociation and are inherently resistant to oxidation. The researchers exploited this resilience by co-injecting a small, precisely metered flow of oxygen into the growth chamber. The oxygen triggers a combustion reaction that burns the organic ligands into volatile carbon dioxide and water vapor, sweeping them away while leaving the platinum and selenium atoms untouched to form pristine PtSe2.</p>
<p>The spectroscopic evidence for this chemistry is striking. Films grown with oxygen show no Raman signals in the 1300 to 1600 per centimeter range, where carbon&#8217;s characteristic D and G bands would appear, while films grown with hydrogen instead of oxygen display both bands, betraying amorphous carbon contamination. X-ray photoelectron spectroscopy reinforced the picture: oxygen-grown films exhibited sharp, symmetric platinum 4f and selenium 3d peaks consistent with a clean, stoichiometric crystal, whereas hydrogen-grown films showed sub-stoichiometric phases and oxidized selenium species, signs that lingering organic residue had interfered with proper bonding. The team also demonstrated that the resulting films are exceptionally stable in air, with Raman peak positions shifting by less than 0.001 percent over seven months of ambient exposure.</p>
<p>Uniformity across the full substrate was verified through a battery of optical and structural measurements. Raman spectroscopy at 36 points across the film found the characteristic in-plane vibrational peak at 181.35 per centimeter, exactly where a monolayer should sit, with a standard deviation of just 0.16 per centimeter, and a narrow peak width indicating few point defects. Ultraviolet-visible absorption confirmed an optical bandgap of approximately 1.5 electron volts, matching theoretical predictions. Atomic force microscopy captured the growth in action: after four hours, triangular grains roughly 100 nanometers across had nucleated simultaneously and grown laterally, with step heights of 0.75 nanometer confirming single-layer thickness; after eight hours, the grains had merged into a fully continuous monolayer. The triangular grains even showed preferential alignment with the six-fold symmetry of the underlying mica, hinting that single-crystalline films may be within reach.</p>
<p>At the atomic scale, high-angle annular dark-field scanning transmission electron microscopy revealed the textbook 1T crystal structure, with each platinum atom coordinated by six selenium atoms and all three atomic sublayers clearly resolved. The measured lattice constant of 3.78 angstroms closely matched the theoretical value of 3.79 angstroms, and selected-area electron diffraction showed diffraction spots arranged in hexagonal patterns, confirming that most grains align with the mica substrate, though the film is not yet fully epitaxial.</p>
<p>The ultimate test came when the team fabricated arrays of bottom-gate field-effect transistors using the monolayer film as the channel, with standard photolithography, hafnium oxide gate dielectric, and gold contacts. The devices delivered a maximum on/off current ratio of 8.31 times ten to the fourth power and a minimum off-current of 3.40 times ten to the negative twelfth amperes per micrometer, the highest ratio and lowest off-current ever reported for PtSe2 film-based transistors. The large monolayer bandgap suppresses the thermally activated carriers that plague thicker, semi-metallic films in the off state. Field-effect mobility reached up to 1.37 square centimeters per volt-second, modest compared with the theoretical ceiling of nearly 1900 for monolayer PtSe2, a gap the researchers attribute to grain boundaries in the roughly 100-nanometer grains, transfer-related residues, interface traps at the dielectric, and unoptimized metal contacts, all of which they identify as targets for future optimization.</p>
<p>Beyond the record numbers, the significance of this work lies in its industrial compatibility. Metal-organic chemical vapor deposition is already the standard route for depositing thin films in commercial semiconductor fabs, and the growth temperature of 470 degrees Celsius is low enough for back-end integration schemes. By demonstrating that a properly designed precursor combined with oxygen-assisted ligand removal can tame a material whose layer count must be controlled to a single atomic plane, the team has established not just a new channel material candidate but a general framework for growing other emerging two-dimensional semiconductors at scale. If grain size and contact engineering can be improved in subsequent work, PtSe2 could graduate from laboratory curiosity to a serious contender in the post-silicon roadmap, with the added possibility that its own semi-metallic thicker form could one day serve as the contacts in entirely platinum-diselenide circuits.</p>
<p><strong>Subject of Research:</strong> Oxygen-assisted MOCVD growth of semiconducting monolayer platinum diselenide films for field-effect transistors</p>
<p><strong>Article Title:</strong> Oxygen‐Assisted MOCVD Growth of Monolayer PtSe2 Films With Bandgap Opening for Semiconducting FET Channels</p>
<p><strong>Article References:</strong> Kim, Y., So, H.-S., Yoo, M., Oh, S., Kim, D., Gyeon, M., Jo, M.-K., Noh, G., Kim, T. S., Kim, M.-G., Park, J., Chai, H.-J., Kang, M., Kim, S., Ham, A., Lee, J., Lim, J., Song, S., Kwak, J. Y., &#8230; Kang, K. (2026). Oxygen‐Assisted MOCVD Growth of Monolayer PtSe 2 Films With Bandgap Opening for Semiconducting FET Channels. <em>Advanced Science, 13</em>(53), Article e76362. <a href="https://doi.org/10.1002/advs.76362" rel="noopener noreferrer">https://doi.org/10.1002/advs.76362</a></p>
<p><strong>Image Credits:</strong> AI Generated</p>
<p><strong>DOI:</strong> <a href="https://doi.org/10.1002/advs.76362" rel="noopener noreferrer">10.1002/advs.76362</a></p>
<p><strong>Keywords:</strong> PtSe2, two-dimensional materials, MOCVD, monolayer semiconductor, field-effect transistor, bandgap engineering, transition metal dichalcogenides, nanoelectronics, thin film growth, oxygen-assisted growth, crystallography, semiconductor manufacturing</p>
]]></content:encoded>
					
		
		
		<post-id xmlns="com-wordpress:feed-additions:1">216397</post-id>	</item>
		<item>
		<title>Five-Layer Van der Waals Selector Devices Set New Bar for Memory Performance</title>
		<link>https://scienmag.com/five-layer-van-der-waals-selector-devices-set-new-bar-for-memory-performance/</link>
		
		<dc:creator><![CDATA[Denise Maddox]]></dc:creator>
		<pubDate>Sat, 12 Sep 2026 20:31:46 +0000</pubDate>
				<category><![CDATA[Technology and Engineering]]></category>
		<category><![CDATA[2D materials in electronics]]></category>
		<category><![CDATA[atomically thin tunnel junctions]]></category>
		<category><![CDATA[crossbar array memory isolation]]></category>
		<category><![CDATA[endurance]]></category>
		<category><![CDATA[five-layer graphene molybdenum disulfide stack]]></category>
		<category><![CDATA[gallium sulfide]]></category>
		<category><![CDATA[hexagonal boron nitride]]></category>
		<category><![CDATA[high-density memory technology]]></category>
		<category><![CDATA[high-speed memory devices]]></category>
		<category><![CDATA[memory cell selectivity in dense arrays]]></category>
		<category><![CDATA[memory crossbar arrays]]></category>
		<category><![CDATA[memory performance enhancement]]></category>
		<category><![CDATA[memristors]]></category>
		<category><![CDATA[molybdenum disulfide]]></category>
		<category><![CDATA[nanoelectronics]]></category>
		<category><![CDATA[Nature Electronics]]></category>
		<category><![CDATA[non-linear memory selectors]]></category>
		<category><![CDATA[nonlinearity]]></category>
		<category><![CDATA[three-dimensional memory]]></category>
		<category><![CDATA[tunnel barrier memory components]]></category>
		<category><![CDATA[tunnel-junction selector]]></category>
		<category><![CDATA[two-terminal selector devices]]></category>
		<category><![CDATA[van der Waals heterostructures]]></category>
		<category><![CDATA[van der Waals selector devices]]></category>
		<guid isPermaLink="false">https://scienmag.com/?p=198356</guid>

					<description><![CDATA[Researchers have built five-layer van der Waals tunnel-junction selectors achieving nonlinearity above ten million, endurance beyond a trillion cycles and 2.5-volt operation for high-density memory arrays.]]></description>
										<content:encoded><![CDATA[<p>A team of researchers led by scientists at the University of Southern California, working with collaborators at the University of Florida, the Air Force Research Laboratory, the US Army Research Laboratory and the National Institute for Materials Science in Japan, has unveiled a new class of two-terminal selector devices built from atomically thin van der Waals materials. Reported in Nature Electronics, the tunnel-junction selectors are constructed from five vertically stacked layers—graphene, molybdenum disulfide, a primary tunnel barrier, another layer of molybdenum disulfide, and graphene on top—and they deliver a combination of nonlinearity, endurance, speed and uniformity that has long eluded the memory industry. The work addresses one of the most persistent bottlenecks in high-density memory: how to isolate the single memory cell being addressed in a dense crossbar array without disturbing all the others.</p>
<p>The underlying problem is well known to memory engineers. Crossbar arrays, in which memory elements sit at the intersections of perpendicular word lines and bit lines, offer the most compact possible memory layout and can be stacked in three dimensions. But in a passive crossbar without a selector, current sneaks through neighboring unselected cells along paths known as sneak currents, corrupting the readout of the intended cell. Selectors are two-terminal devices placed in series with each memory element—forming one-selector-one-resistor or one-selector-one-capacitor cells—to suppress these parasitic currents. An ideal selector must be extremely nonlinear, passing large current only at its selected operating voltage while blocking current at half or a fraction of that voltage, yet it must also survive trillions of switching cycles, respond in nanoseconds, remain stable across temperatures and operate identically from device to device. No single selector technology has satisfied all of these requirements simultaneously.</p>
<p>The USC-led team&#8217;s answer is a graded tunnel barrier realized entirely within a van der Waals heterostructure. Instead of a single uniform insulating barrier, the device stacks materials of different band alignments so that the effective barrier profile changes with applied voltage. At low voltages, the barrier remains thick and high, strangling leakage current to negligible levels. As the voltage across the device rises toward the read or write condition, the barrier is thinned and lowered in a controlled fashion, allowing electrons to tunnel through with high efficiency. The result is an exponential increase in current over a small voltage window—precisely the nonlinearity that crossbar selectors demand.</p>
<p>To move beyond trial and error, the researchers developed a theoretical model that predicts the electrical characteristics of selectors with graded tunnel barriers. Guided by this model, they designed and fabricated two specific device structures. In the first, the primary tunnel barrier is hexagonal boron nitride, the wide-bandgap insulator often called white graphene. In the second, the barrier is gallium sulfide, a layered semiconductor with a smaller bandgap. Both variants sandwich the barrier between two layers of molybdenum disulfide, with graphene sheets serving as the top and bottom electrodes, forming the complete five-layer stack graphene/molybdenum disulfide/barrier/molybdenum disulfide/graphene.</p>
<p>The performance of the hexagonal boron nitride device is striking. It exhibits a nonlinearity exceeding 10 million, meaning the current at the operating voltage is more than ten million times larger than the leakage current at reduced voltages—among the highest values reported for any two-terminal selector. Perhaps more impressive is its endurance: the device survived more than a trillion switching cycles without failure, a figure that dwarfs the lifetimes of many competing selector technologies and approaches what commercial memory products require. Switching occurs in less than 20 nanoseconds, the current-voltage characteristics show minimal temperature dependence, and the variation from one device to another is low—critical attributes for manufacturing, where billions of cells must behave nearly identically.</p>
<p>The gallium sulfide variant trades some nonlinearity for a dramatically reduced operating voltage. Because gallium sulfide has a smaller barrier height than hexagonal boron nitride, the device can deliver a nonlinearity above one million while operating at only 2.5 volts. Low-voltage operation matters enormously for modern memory, which must integrate with silicon circuitry whose supply voltages continue to shrink. A selector that requires high voltages to turn on forces the surrounding periphery circuitry to handle elevated stress; a selector that switches at 2.5 volts eases that burden and reduces overall energy consumption during write operations.</p>
<p>Beyond single devices, the team demonstrated that their selectors can be integrated into functional memory cells. They built one-selector-one-resistor cells by pairing the selectors with memristive devices, including a hafnium-oxide-based memristor stack with palladium electrodes, and they also demonstrated one-selector-one-capacitor configurations. This dual compatibility with both resistive nonvolatile memory and capacitive volatile memory suggests the selector technology is genuinely universal, applicable across different memory families rather than tied to a single cell type. The researchers benchmarked their devices against the broad landscape of existing selector technologies—including ovonic threshold switching chalcogenides, niobium oxide threshold devices, metal-insulator-metal tunnel diodes and mixed-ionic-electronic-conduction access devices—and found that the van der Waals approach uniquely combines high selectivity with trillion-cycle endurance, nanosecond speed, temperature stability and low variability.</p>
<p>Choosing van der Waals materials is central to the achievement. These layered crystals are held together by weak interlayer forces, so each atomic plane can be exfoliated and restacked like molecular building blocks without the dangling bonds and interfacial defects that plague conventional three-dimensional semiconductors. Atomically sharp interfaces mean the tunnel barrier thickness is controlled layer by layer, giving designers reproducible, deterministic barrier profiles. Graphene electrodes contribute their own advantages, providing chemically inert, highly conductive contacts that do not interdiffuse with the underlying layers. The same properties that have made van der Waals heterostructures a playground for condensed matter physics here translate directly into manufacturable device metrics: negligible cycling variation, minimal temperature dependence and good interdevice uniformity all flow from the crystalline perfection of the interfaces.</p>
<p>The implications extend toward the long-sought goal of three-dimensional memory stacking. Because the entire selector is built from vertically stacked two-dimensional layers, it is inherently stackable, unlike selectors that rely on complex oxide growth or electroforming processes that are difficult to repeat layer upon layer. Paired with scalable nonvolatile memories such as memristors and phase-change or resistive cells, these selectors could enable dense three-dimensional crossbar memories for storage-class memory, in-memory computing and neuromorphic artificial intelligence hardware, where analog crossbar arrays perform vector-matrix multiplications directly in hardware. The research team, whose work was supported by the Army Research Office, the Air Force Office of Scientific Research and the National Science Foundation, has also released the experimental and simulation data through the Harvard Dataverse, giving the broader community the tools to build on the design framework. As the demand for data storage and energy-efficient computation continues its relentless climb, devices that tame sneak currents with atomic precision may prove to be one of the quiet enablers of the next memory generation.</p>
<p><strong>Subject of Research:</strong> Van der Waals tunnel-junction selector devices with graded tunnel barriers for high-density memory crossbar arrays</p>
<p><strong>Article Title:</strong> High-performance tunnel-junction selectors with graded tunnel barriers based on five-layer van der Waals heterostructures</p>
<p><strong>Article References:</strong> Liu, H., Liao, H.-T., Li, M., Yang, N., Hsu, T.-H., Zhao, R., Xu, Y., Kim, S. J., Ni, Y., Chenna, V., Mahalingam, K., Bowers, C., Ganguli, S., Roy, A. K., Watanabe, K., Taniguchi, T., Hashemi, H., Guo, J., Dubey, M., &#8230; Joshua Yang, J. (2026). High-performance tunnel-junction selectors with graded tunnel barriers based on five-layer van der Waals heterostructures. <em>Nature Electronics</em>. <a href="https://doi.org/10.1038/s41928-026-01704-2" rel="noopener noreferrer">https://doi.org/10.1038/s41928-026-01704-2</a></p>
<p><strong>Image Credits:</strong> AI Generated</p>
<p><strong>DOI:</strong> <a href="https://doi.org/10.1038/s41928-026-01704-2" rel="noopener noreferrer">10.1038/s41928-026-01704-2</a></p>
<p><strong>Keywords:</strong> van der Waals heterostructures, tunnel-junction selector, memory crossbar arrays, molybdenum disulfide, hexagonal boron nitride, gallium sulfide, memristors, nonlinearity, endurance, three-dimensional memory, nanoelectronics, Nature Electronics</p>
]]></content:encoded>
					
		
		
		<post-id xmlns="com-wordpress:feed-additions:1">198356</post-id>	</item>
		<item>
		<title>Carbon Nanotube Transistors Emerge as Powerful Successors to Silicon</title>
		<link>https://scienmag.com/carbon-nanotube-transistors-emerge-as-powerful-successors-to-silicon/</link>
		
		<dc:creator><![CDATA[Denise Maddox]]></dc:creator>
		<pubDate>Sat, 12 Sep 2026 16:20:35 +0000</pubDate>
				<category><![CDATA[Technology and Engineering]]></category>
		<category><![CDATA[atomic structure of nanotubes]]></category>
		<category><![CDATA[bandgap engineering]]></category>
		<category><![CDATA[biosensors]]></category>
		<category><![CDATA[carbon nanotube fabrication methods]]></category>
		<category><![CDATA[carbon nanotube transistors]]></category>
		<category><![CDATA[carbon nanotubes]]></category>
		<category><![CDATA[CMOS compatibility]]></category>
		<category><![CDATA[CNTFET]]></category>
		<category><![CDATA[CNTFET device physics]]></category>
		<category><![CDATA[CNTFETs]]></category>
		<category><![CDATA[field-effect transistors]]></category>
		<category><![CDATA[flexible electronics]]></category>
		<category><![CDATA[future of electronics beyond silicon]]></category>
		<category><![CDATA[integration with CMOS manufacturing]]></category>
		<category><![CDATA[leakage current reduction]]></category>
		<category><![CDATA[Moore's law]]></category>
		<category><![CDATA[nanoelectronics]]></category>
		<category><![CDATA[neuromorphic computing]]></category>
		<category><![CDATA[post-silicon electronics]]></category>
		<category><![CDATA[post-silicon semiconductor technology]]></category>
		<category><![CDATA[quantum transport]]></category>
		<category><![CDATA[short-channel effects in transistors]]></category>
		<category><![CDATA[SRAM]]></category>
		<category><![CDATA[transistor scaling challenges]]></category>
		<guid isPermaLink="false">https://scienmag.com/?p=196259</guid>

					<description><![CDATA[A new comprehensive review maps the physics, fabrication, and applications of carbon nanotube field-effect transistors as leading candidates to succeed silicon in future electronics.]]></description>
										<content:encoded><![CDATA[<p>Silicon has ruled the electronics world for more than half a century, but its dominance is showing cracks. As transistor gate lengths shrink toward the 6 to 12 nanometer regime, engineers are battling short-channel effects, runaway leakage currents, and the physical limits of ultra-thin gate oxides. A comprehensive new review published in Results in Physics argues that carbon nanotube field-effect transistors, or CNTFETs, may be the most credible path beyond silicon, offering a detailed synthesis of the structures, models, fabrication routes, and applications that could carry electronics into the post-silicon era.</p>
<p>The review, authored by Nada Salem, Ahmed Shaker, Mahmoud Ossaimee, Ahmed Saeed, Mohamed Abouelatta, and El-Sayed M. El-Rabaie, takes an unusually integrated approach. Rather than treating device physics, manufacturing, and circuit applications as separate silos, the authors connect the atomic structure of carbon nanotubes directly to transistor behavior and ultimately to commercial viability. This matters because the performance of a CNTFET is not determined by the nanotube alone; contact resistance, tube alignment, density control, metallic-tube removal, and compatibility with existing CMOS manufacturing all shape whether carbon can genuinely replace silicon in a factory setting.</p>
<p>At the heart of the technology lies a deceptively simple material trick. A carbon nanotube is a sheet of graphene rolled into a cylinder roughly one nanometer in diameter, and the precise way it is rolled, defined by its chirality indices (n, m), determines whether it behaves as a metal or a semiconductor. Tubes in which the difference between the two indices is divisible by three are nominally metallic, while the rest are semiconducting. For semiconducting single-walled tubes, the bandgap scales approximately inversely with diameter, following the relation Eg of about 0.84 divided by the diameter in nanometers. That simple formula gives device engineers a powerful tuning knob: choosing the tube diameter effectively sets the threshold voltage, the leakage current, and the ON-state current of the resulting transistor.</p>
<p>The physics inside these devices is equally striking. Because carriers are confined to a one-dimensional channel, transport can approach the ballistic limit, where electrons traverse the channel without scattering. Clean carbon nanotube channels have demonstrated carrier mobilities of roughly 1,000 to 10,000 square centimeters per volt-second, an order of magnitude or more above scaled silicon, with characteristic carrier velocities of 2 to 5 times ten to the seventh centimeters per second against a theoretical Fermi velocity ceiling near 8 times ten to the seventh. Subthreshold swings can approach 60 to 80 millivolts per decade, and ON/OFF current ratios spanning 10^5 to 10^8 have been reported depending on diameter, contacts, and dielectric engineering. These numbers explain why researchers have chased carbon nanotubes since the first CNTFET was demonstrated in 1998.</p>
<p>Architecture has evolved considerably since those early proof-of-concept devices. Back-gated transistors, in which the silicon substrate itself acts as the gate, were simple to build but suffered from contact resistances of a megohm or more and weak electrostatic control. Top-gated designs introduced thin dielectrics deposited by atomic layer deposition, tightening gate coupling and enabling individual devices to be isolated on a single wafer. Wrap-around or gate-all-around structures, demonstrated in 2008, surround the nanotube entirely, suppressing leakage and short-channel effects most effectively. Suspended devices, in which the tube hangs free over a trench, minimize substrate scattering and reveal the intrinsic transport properties of the material, though mechanical instability and limited dielectric options keep them largely a laboratory tool.</p>
<p>Modeling this zoo of devices has produced a rich theoretical landscape. Ballistic models, built on the Landauer formalism, estimate the performance ceiling of ideal short-channel devices. Quasi-ballistic and non-ballistic models add phonon scattering through virtual-source and Landauer-Büttiker approaches, capturing the roughly 30 percent current reduction that dissipative transport imposes in realistic channels. Tunneling-based compact models account for band-to-band tunneling that dominates in small-bandgap tubes under bias, while full non-equilibrium Green&#8217;s function formulations solve quantum transport self-consistently with electrostatics, linking device behavior directly to the chiral index of the tube. For circuit designers, SPICE-compatible compact models such as the Stanford virtual-source CNFET model bridge the gap, embedding quantum capacitance, contact resistance, and ambipolar conduction into tools that can evaluate logic, memory, and radio-frequency circuits.</p>
<p>Fabrication remains the decisive battleground. Modern processes grow horizontally aligned nanotube arrays on quartz by chemical vapor deposition at densities near three tubes per micrometer, transfer them to oxidized silicon wafers, selectively remove metallic tubes, and deposit high-k gate stacks of titanium dioxide with titanium-platinum electrodes. The resulting devices show improved ON/OFF ratios and reduced device-to-device variability, and the low processing temperatures make the route compatible with CMOS thermal budgets. On a very different frontier, aerosol jet printing has been used to fabricate working CNTFETs on flexible Kapton substrates using silver ink electrodes and cross-linked polymer dielectrics, opening a path toward wearable and bendable electronics that rigid silicon cannot serve.</p>
<p>The application portfolio is expanding fast. CNTFET biosensors have detected the H1N1 virus, DNA modifications, prostate-specific antigen at concentrations from 5 to 5000 picograms per milliliter, and SARS-CoV-2 spike protein epitopes within minutes, exploiting the nanometer-scale match between tube and biomolecule. In memory research, devices using hafnium oxide gates have achieved write and erase operations with 100-nanosecond pulses, roughly 10,000 times faster than earlier carbon nanotube memory, with retention exceeding four hours and endurance past 18,000 cycles. Digital demonstrations include 1-kilobit six-transistor SRAM arrays built with carbon nanotube CMOS, ternary logic gates that combine CNTFETs with resistive memory, and approximate multipliers for energy-efficient image processing. Wafer-scale synaptic transistors exploit the sensitivity of nanotubes to charged defects, positioning carbon at the heart of neuromorphic computing architectures that dissolve the boundary between logic and memory.</p>
<p>Even with this momentum, the review is candid about the barriers. Chirality-controlled synthesis of high-purity semiconducting tubes at wafer scale remains unsolved, and even small diameter variations shift bandgaps enough to scatter threshold voltages across a chip. Residual metallic tubes create leakage paths, contact engineering at the metal-carbon interface still introduces Schottky barriers and variability, and self-heating in real devices, where nanotube-to-substrate thermal boundary resistance limits heat dissipation, threatens reliability despite the exceptional intrinsic thermal conductivity of individual tubes. Uniform high-k dielectric deposition on chemically inert nanotube surfaces, variation-aware compact modeling, and back-end-of-line integration with existing CMOS flows round out the challenge list.</p>
<p>What emerges from the full picture is a technology standing at a genuine inflection point. The intrinsic material advantages of carbon nanotubes, from near-ballistic transport and diameter-tunable bandgaps to mechanical flexibility and bioscale sensitivity, are no longer in dispute. The remaining work is industrial: scalable purification, wafer-level alignment, stable low-resistance contacts, and standardized benchmarking against silicon and emerging two-dimensional materials. If those pieces fall into place, the authors conclude, CNTFETs are strong contenders to deliver the high-performance, energy-efficient, and miniaturized electronics that the next generation of computing, sensing, and communication systems will demand.</p>
<p><strong>Subject of Research:</strong> Carbon nanotube field-effect transistors as post-silicon electronic devices</p>
<p><strong>Article Title:</strong> Structure, modeling, fabrication, and applications of carbon nanotube field-effect transistors: a comprehensive review</p>
<p><strong>Article References:</strong> Salem, N., Shaker, A., Ossaimee, M., Saeed, A., Abouelatta, M., &amp; El-Rabaie, E.-S. M. (2026). Structure, modeling, fabrication, and applications of carbon nanotube field-effect transistors: a comprehensive review. <em>Results in Physics, 89</em>, Article 108749. <a href="https://doi.org/10.1016/j.rinp.2026.108749" rel="noopener noreferrer">https://doi.org/10.1016/j.rinp.2026.108749</a></p>
<p><strong>Image Credits:</strong> AI Generated</p>
<p><strong>DOI:</strong> <a href="https://doi.org/10.1016/j.rinp.2026.108749" rel="noopener noreferrer">10.1016/j.rinp.2026.108749</a></p>
<p><strong>Keywords:</strong> carbon nanotubes, CNTFET, field-effect transistors, post-silicon electronics, Moore&#x27;s law, bandgap engineering, neuromorphic computing, biosensors, SRAM, CMOS compatibility, quantum transport, flexible electronics</p>
]]></content:encoded>
					
		
		
		<post-id xmlns="com-wordpress:feed-additions:1">196259</post-id>	</item>
		<item>
		<title>CoSi Semimetal Wires Beat Copper by Getting Better as They Shrink</title>
		<link>https://scienmag.com/cosi-semimetal-wires-beat-copper-by-getting-better-as-they-shrink/</link>
		
		<dc:creator><![CDATA[Denise Maddox]]></dc:creator>
		<pubDate>Sat, 12 Sep 2026 12:56:07 +0000</pubDate>
				<category><![CDATA[Technology and Engineering]]></category>
		<category><![CDATA[advancements in nanoscale electronic components]]></category>
		<category><![CDATA[alternative materials for chip interconnects]]></category>
		<category><![CDATA[challenges in miniaturizing computer chips]]></category>
		<category><![CDATA[chip wiring]]></category>
		<category><![CDATA[cobalt silicide as a replacement for copper]]></category>
		<category><![CDATA[copper replacement]]></category>
		<category><![CDATA[CoSi]]></category>
		<category><![CDATA[electrical resistivity reduction in thin films]]></category>
		<category><![CDATA[electromigration]]></category>
		<category><![CDATA[Fermi arcs]]></category>
		<category><![CDATA[high current density tolerance in semimetal wires]]></category>
		<category><![CDATA[impact of reduced wire dimensions on electron scattering]]></category>
		<category><![CDATA[interconnects]]></category>
		<category><![CDATA[limitations of copper wiring in microelectronics]]></category>
		<category><![CDATA[materials science of topological semimetals]]></category>
		<category><![CDATA[nanoelectronics]]></category>
		<category><![CDATA[nanoscale copper interconnects]]></category>
		<category><![CDATA[Nature Materials]]></category>
		<category><![CDATA[resistivity scaling]]></category>
		<category><![CDATA[ring oscillator]]></category>
		<category><![CDATA[semimetal]]></category>
		<category><![CDATA[size-dependent electrical conductivity]]></category>
		<category><![CDATA[topological materials]]></category>
		<category><![CDATA[topological semimetal CoSi]]></category>
		<guid isPermaLink="false">https://scienmag.com/?p=194551</guid>

					<description><![CDATA[Researchers have shown that single-crystalline cobalt silicide semimetal nanoflakes become more conductive as they thin, outperforming copper at the nanoscale and surviving extreme current densities and temperatures.]]></description>
										<content:encoded><![CDATA[<p>For half a century, the relentless shrinking of computer chips has been governed by a simple rule: make everything smaller, faster and more efficient. Yet one component has quietly become a bottleneck that threatens the entire trajectory of modern electronics. The copper wires that carry signals between transistors, known as interconnects, lose their legendary conductivity as their dimensions shrink toward the nanoscale. Now, a team of researchers led by Yang Chai at The Hong Kong Polytechnic University reports a striking solution: single-crystalline cobalt silicide (CoSi), a topological semimetal whose electrical resistivity actually falls as the material gets thinner. The work, published in Nature Materials, demonstrates that 20-nanometre-thick CoSi films conduct electricity roughly ten times better than copper of the same thickness, while withstanding current densities and temperatures that would destroy conventional metal wires.</p>
<p>The problem with copper is fundamental to the physics of charge transport at small scales. In a bulk metal, electrons travel long distances before scattering off imperfections, giving copper its famously low resistivity of about 1.7 micro-ohm centimetres. But when a wire&#8217;s dimensions approach the mean free path of its electrons, two effects conspire to raise resistance dramatically. Electrons begin to scatter off the surfaces and grain boundaries of the wire, and the effective cross-section available for conduction shrinks. In state-of-the-art copper interconnects, which in the most advanced chips have critical dimensions below 20 nanometres, this size effect causes resistivity to soar, producing signal delays, wasted power and degraded reliability. As the semiconductor industry pushes toward ever-denser circuitry, the wires that tie transistors together have become a limiting factor in computing performance.</p>
<p>The Hong Kong Polytechnic University team, together with collaborators at South China Normal University, The Hong Kong University of Science and Technology, The University of Hong Kong, the Taiwan Semiconductor Research Institute and National Taiwan Normal University, turned to an unconventional class of conductors: topological semimetals. Materials such as CoSi host exotic electronic states in which electrons are protected from backscattering by the topology of their band structure. In particular, CoSi possesses long-lived Fermi-arc surface states, chiral electronic pathways that live on the surfaces of the crystal and are remarkably resistant to the scattering that plagues ordinary metals. The researchers reasoned that if these surface states are highly conductive, then making the material thinner, which increases the surface-to-volume ratio, should improve rather than degrade its overall conductivity.</p>
<p>To test this idea, the team grew high-quality single crystals of CoSi and fabricated nanoflakes with thicknesses spanning from one micrometre down to roughly 20 nanometres. The results were unambiguous and, by the standards of conventional metals, almost paradoxical. As the CoSi thickness decreased from 1 micrometre to about 20 nanometres, the resistivity dropped from 7.0 to 0.72 micro-ohm centimetres, a nearly tenfold improvement. The highly conductive surface path, dominated by the topological Fermi-arc states, progressively takes over as the bulk contribution diminishes with thickness. At room temperature, the resistivity of 20-nanometre-thick CoSi is one-tenth that of copper at the same thickness, a margin that could transform the design of the wiring layers in future chips.</p>
<p>Conductivity alone, however, is not enough to qualify a material as an interconnect candidate. Chip wiring must survive brutal operating conditions. Current densities in modern interconnects can exceed millions of amperes per square centimetre, and the resulting momentum transfer from electrons to metal atoms drives electromigration, the gradual transport of atoms that eventually opens voids and breaks the wire. Copper is particularly vulnerable at small dimensions, where grain boundaries and surfaces provide fast diffusion pathways for atoms. The CoSi semimetal, by contrast, is held together by exceptionally strong bonding. The researchers calculated a cohesive energy of 5.4 electronvolts and an atom migration barrier of 3.7 electronvolts, values far higher than those of copper. Experimentally, CoSi nanoflakes maintained reliable conduction at current densities of up to 10^8 amperes per square centimetre and at temperatures up to 450 degrees Celsius, performance that positions the material among the most robust thin-film conductors ever characterized.</p>
<p>The team also verified that CoSi can handle the high-frequency demands of modern communications circuitry. Radiofrequency measurements showed that CoSi interconnects operate cleanly at frequencies up to 40 gigahertz, a regime relevant to wireless transceivers, high-speed data links and advanced processors. Low loss and stable impedance at these frequencies are essential for any material hoping to replace copper in the back-end-of-line metallization of a chip, and the measurements suggest that CoSi&#8217;s smooth single-crystalline surfaces and low resistivity translate directly into excellent high-frequency behaviour.</p>
<p>Perhaps most convincingly, the researchers moved beyond isolated test structures and integrated a CoSi interconnect into a functioning silicon circuit. They connected a 16-nanometre-node silicon ring oscillator, a standard benchmark circuit used to evaluate process technology, using CoSi wiring. The oscillator operated at the same frequency as an identical circuit wired with conventional metal interconnects, demonstrating that the exotic semimetal can be married to mainstream silicon manufacturing without degrading circuit performance. This on-chip demonstration is a critical milestone, because many promising nanomaterials have faltered at exactly this step, proving difficult to integrate with the complementary metal-oxide-semiconductor processes that underpin the global electronics industry.</p>
<p>The findings arrive at a moment of intense searching within the semiconductor community. As copper interconnects approach their physical limits, researchers have explored a wide range of alternatives, including graphene, carbon nanotubes and other topological semimetals such as NbAs, NbP and MoP. Recent studies have shown surface-dominated transport in Weyl semimetal nanowires and ultrahigh conductivity in NbAs nanobelts, but questions of manufacturability, reliability and integration have kept any successor to copper out of production. CoSi stands out because it combines several advantages at once: a resistivity that improves with scaling, extraordinary electromigration resistance, thermal stability well beyond typical chip operating temperatures, proven high-frequency performance and demonstrated compatibility with a commercial silicon technology node.</p>
<p>There are, of course, hurdles between a laboratory demonstration and a production line. The CoSi nanoflakes in this study were grown and characterized as single crystals, and future work will need to establish scalable deposition methods, patterning techniques and via integration compatible with high-volume manufacturing. The contact resistance between CoSi and other chip materials, the chemical stability of the semimetal during processing, and the cost of adopting a new metallization scheme all remain open engineering questions. Still, the fundamental physics reported here inverts the central dilemma of interconnect scaling. Instead of fighting a material that gets worse as it gets smaller, chip designers could embrace one that gets better, turning the relentless miniaturization that once threatened copper wiring into an advantage for topological semimetals.</p>
<p>If CoSi and its relatives can clear the remaining manufacturing barriers, the implications extend beyond faster smartphones and data centres. Interconnect resistance is a growing share of the energy budget of modern computing, and taming it would reduce power consumption across everything from cloud servers to edge devices. The work also signals a broader convergence between topological quantum materials and mainstream electronics, a field long dominated by theoretical promise rather than practical devices. With a material that conducts better at 20 nanometres than at a micrometre, survives currents that vaporize copper and runs at 40 gigahertz inside a working silicon chip, the researchers have offered the semiconductor industry a glimpse of what may come after copper, and a reason to believe that the end of transistor scaling is not, after all, the end of computing progress.</p>
<p><strong>Subject of Research:</strong> Single-crystalline cobalt silicide (CoSi) semimetal as a highly conductive and reliable nanoscale interconnect material to replace copper in advanced chips</p>
<p><strong>Article Title:</strong> Single-crystalline CoSi semimetals with high conductivity and reliability</p>
<p><strong>Article References:</strong> Chen, J., Yan, J., Fan, L., Zheng, T., Che, X., Zhu, C., Lu, W., Deng, M., Ng, Y. H., Wang, Z., Wan, Y., Jiang, X., Zhu, Y., Yang, Z., Chen, K. J., Liang, B.-W., Li, K.-S., Lan, Y.-W., Li, L.-J., &amp; Chai, Y. (2026). Single-crystalline CoSi semimetals with high conductivity and reliability. <em>Nature Materials</em>. <a href="https://doi.org/10.1038/s41563-026-02740-1" rel="noopener noreferrer">https://doi.org/10.1038/s41563-026-02740-1</a></p>
<p><strong>Image Credits:</strong> AI Generated</p>
<p><strong>DOI:</strong> <a href="https://doi.org/10.1038/s41563-026-02740-1" rel="noopener noreferrer">10.1038/s41563-026-02740-1</a></p>
<p><strong>Keywords:</strong> CoSi, semimetal, interconnects, copper replacement, topological materials, resistivity scaling, electromigration, nanoelectronics, Fermi arcs, ring oscillator, Nature Materials, chip wiring</p>
]]></content:encoded>
					
		
		
		<post-id xmlns="com-wordpress:feed-additions:1">194551</post-id>	</item>
	</channel>
</rss>
