The Electrical Testing Board, described in the open-access journal HardwareX by a research team led by Geu M. Puentes-Conde of the Universidad Autónoma de Ciudad Juárez, is a four-layer FR-4 board measuring 187 by 160 millimeters, complete with an integrated carrying handle and an 88-pin gold-finger edge connector designed for backplane integration. Rather than attempting to replace a full-scale industrial test station, the platform is positioned as a compact, reproducible alternative for circuit prototyping, academic instruction and small-scale manufacturing, where the economics of full in-circuit testing infrastructure remain prohibitive. The hardware is released under the CERN Open Hardware License v2.0, its firmware under the GNU General Public License v3.0, and its documentation under Creative Commons Attribution 4.0.

In-circuit testing verifies the values and structural integrity of individual components soldered onto a board, while functional testing validates the overall operational behavior of the finished device. Both methodologies are indispensable in industry because defects can arise from many sources: improper material handling, components that fall outside parametric tolerances, failures in surface-mount assembly equipment, or simple human error. Commercial systems from vendors such as Keysight Technologies, Teradyne and SPEA apply voltage or current stimuli through test nodes, route the resulting signals through multiplexers and conditioning stages involving amplification, filtering and linearization, and finally digitize the analog result to yield electrical parameters such as resistance, capacitance, inductance, voltage, current and short- or open-circuit status. The new board follows this same architectural logic, but in a radically miniaturized and democratized form.

At the heart of the design is a three-board modular stack. A main PCB houses the functional test modules, a relay PCB carries the switching matrices, and a pluggable MCU PCB hosts the primary controller, a Microchip PIC32MX795F512L running at 80 megahertz. Because the core module is a daughterboard, a failed microcontroller can be swapped in seconds without any desoldering. Two slave PIC18F4620 microcontrollers, managed over the I2C bus, drive the relay matrices and handle auxiliary input and output tasks. Sixteen test nodes connect the device under test to four relay-based switching buses, labeled V+, M+, M− and G−, which route signals among the programmable power supplies, the digital multimeter subsystem, comparators, programmable pull-up and pull-down networks, and protection circuitry. The reed relays at the center of these matrices, Coto 9012-12-11 units, actuate in roughly 0.35 milliseconds, allowing a complete in-circuit or functional measurement cycle of 10 to 50 milliseconds per device.

The measurement capabilities are broad. The onboard digital multimeter offers voltmeter ranges of 0 to 10 volts and 0 to 100 volts through a 16-bit successive-approximation ADC paired with a low-drift 10-volt precision reference, ammeter ranges from 1 microampere to 1 milliampere across three calibrated gain stages built around a transimpedance amplifier, resistance measurements from 0.5 ohms to 1 megohm using a ratiometric voltage-divider method, and capacitance measurements from 10 nanofarads to 220 microfarads. Rather than replicating the expensive AC voltammetry and synchronous phase-detection approach used in commercial systems, the designers adopted a direct interface circuit technique: the unknown capacitor is charged and then discharged through a known reference resistor while an embedded timer measures the interval until a comparator threshold is crossed, from which capacitance follows from simple logarithmic relations. The method trades some accuracy at the low end of the range for dramatic reductions in circuit complexity and cost.

Validation against reference instrumentation suggests the trade-offs are manageable for its intended audience. Benchmarked against an HP 34401A six-and-a-half-digit multimeter, the voltmeter stayed within 0.14 percent relative error at low-voltage test points of 1, 3.3 and 5 volts, with error and variance growing at higher voltages, reaching about 0.91 percent at 90 volts, a divergence the authors attribute to attenuation networks and parasitic loading in the high-voltage path. The ammeter achieved sub-percent errors at points such as 5 microamperes and 150 microamperes, though deviations grew near the top of each subrange. Resistance measurements remained below 1 percent relative error across 1 kilohm to 1 megohm, while the lowest point, 0.5 ohms, showed an 11.31 percent error driven by relay contact resistance, a systematic offset the firmware can compensate through tare calibration. Capacitance accuracy was weakest at 10 nanofarads, with errors above 30 percent, but settled to roughly 8 to 10 percent for bulk values of 100 and 220 microfarads.

Beyond raw metrology, the platform is designed for integration into automated test equipment environments. It communicates with a host computer or programmable logic controller over RS-232, opto-isolated UART buses, or Ethernet through a Microchip LAN8720 physical layer transceiver, using a checksum-protected packet protocol in which command bytes select tasks such as automated testing, limit transmission and data retrieval. Up to 12 boards can be daisy-chained under a single host controller, each addressed by a dedicated digital selection line and monitored through a busy-status output. In a demonstration implementation, eight boards ran parallel end-of-line tests across a multi-cavity fixture pallet, performing power-up sequencing, firmware register extraction over UART, harness continuity checks, battery voltage profiling, quiescent current measurement, pneumatic actuation of buttons via high-current relay outputs, busbar presence verification and even acoustic pattern validation through the onboard audio conditioning circuit, a capability absent from the commercial systems the authors compared against.

The team is candid about the limits of the platform. It supports a single device under test per board, offers 16 test nodes compared with up to 2,592 on a two-module Keysight i3070 system, and its practical analog bandwidth is deliberately limited to DC to 10 kilohertz by the relay switching network. It cannot measure inductance, does not support IEEE 1149.1 JTAG boundary-scan testing, and is not certified for industrial deployment, restricting its scope to controlled laboratory, prototyping and small-production settings operated by qualified engineering personnel. Long-term relay endurance, thermal drift, fault injection robustness and full metrological characterization were also left as explicit future work. Power consumption, however, is modest: roughly 2.5 watts at idle and between 3.1 and 6 watts during typical testing routines.

The economic argument is nevertheless compelling. Where a complete commercial system with instrument cards, chassis and enclosure can run into six figures, the proposed assembly costs about $790 to fabricate, or an estimated $3,500 for a full system including host controller, enclosure, cables and test probes, still roughly an order of magnitude below the entry point of industrial hardware, which typically demands $25,000 to $250,000. All design files, schematics, firmware, bill of materials and even a debugging enclosure are openly available through a public repository, enabling any competent electronics laboratory to replicate or adapt the platform.

The implications extend beyond manufacturing quality control. The authors envision materials scientists using the programmable switching matrices and multimeter to map resistance and capacitance across novel conductive polymers or biological tissue samples, applied physics laboratories replacing bulky benchtop instruments in automated experiments, environmental researchers deploying the opto-isolated inputs and Ethernet interface as a ruggedized sensor node layer, and embedded acoustics teams exploiting the audio conditioning chain for voice and frequency pattern work. Future development will focus on integrating machine learning directly into the firmware layer to shorten test cycles and enable predictive fault isolation, along with expanding the physical node architecture to widen signal routing capacity and test coverage. For a field in which the cost of entry has quietly determined who can afford rigorous electrical verification, an open, sub-$1,000 testing platform may prove to be one of the more quietly disruptive hardware releases of the year.

Subject of Research: A low-cost modular open-hardware PCB assembly for in-circuit and functional testing of electronic devices

Article Title: A low-cost modular PCB assembly for functional and in-circuit testing

Article References: Puentes-Conde, G. M., Sifuentes, E., Molina, J., Enríquez-Aguilera, F., Bravo, G., & Ávila, A. H. (2026). A low-cost modular PCB assembly for functional and in-circuit testing. HardwareX, 28, Article e00844. https://doi.org/10.1016/j.ohx.2026.e00844

Image Credits: AI Generated

DOI: 10.1016/j.ohx.2026.e00844

Keywords: in-circuit testing, functional testing, open-source hardware, printed circuit board, automated test equipment, digital multimeter, relay switching matrix, electronics manufacturing, small and medium enterprises, microcontroller, capacitance measurement, HardwareX