<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:wfw="http://wellformedweb.org/CommentAPI/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	xmlns:atom="http://www.w3.org/2005/Atom"
	xmlns:sy="http://purl.org/rss/1.0/modules/syndication/"
	xmlns:slash="http://purl.org/rss/1.0/modules/slash/"
	>

<channel>
	<title>energy-efficient neural circuit implementation &#8211; Science</title>
	<atom:link href="https://scienmag.com/tag/energy-efficient-neural-circuit-implementation/feed/" rel="self" type="application/rss+xml" />
	<link>https://scienmag.com</link>
	<description></description>
	<lastBuildDate>Fri, 16 Oct 2026 16:19:30 +0000</lastBuildDate>
	<language>en-US</language>
	<sy:updatePeriod>
	hourly	</sy:updatePeriod>
	<sy:updateFrequency>
	1	</sy:updateFrequency>
	<generator>https://wordpress.org/?v=7.1.3</generator>

<image>
	<url>https://scienmag.com/wp-content/uploads/2024/07/cropped-scienmag_ico-32x32.jpg</url>
	<title>energy-efficient neural circuit implementation &#8211; Science</title>
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	<width>32</width>
	<height>32</height>
</image> 
<site xmlns="com-wordpress:feed-additions:1">73899611</site>	<item>
		<title>FPGA Chip Runs 10,000-Neuron Cortex Model in Real Time to Simulate Anesthesia</title>
		<link>https://scienmag.com/fpga-chip-runs-10000-neuron-cortex-model-in-real-time-to-simulate-anesthesia/</link>
		
		<dc:creator><![CDATA[Cassandra Pierce]]></dc:creator>
		<pubDate>Fri, 16 Oct 2026 16:19:30 +0000</pubDate>
				<category><![CDATA[Medicine]]></category>
		<category><![CDATA[Science News]]></category>
		<category><![CDATA[advanced brain modeling with reconfigurable silicon]]></category>
		<category><![CDATA[anesthetic-induced]]></category>
		<category><![CDATA[computational neuroscience and anesthesia mechanisms]]></category>
		<category><![CDATA[cortical]]></category>
		<category><![CDATA[digital replication of cortical brain activity]]></category>
		<category><![CDATA[dynamics]]></category>
		<category><![CDATA[energy-efficient neural circuit implementation]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[FPGA chip for neuroscience research]]></category>
		<category><![CDATA[FPGA-based cortical neuron modeling]]></category>
		<category><![CDATA[high-performance neural simulation hardware]]></category>
		<category><![CDATA[Investigating]]></category>
		<category><![CDATA[large-scale]]></category>
		<category><![CDATA[large-scale spiking neuron network emulation]]></category>
		<category><![CDATA[Modeling]]></category>
		<category><![CDATA[modeling unconsciousness and wakefulness transitions]]></category>
		<category><![CDATA[networks]]></category>
		<category><![CDATA[neural]]></category>
		<category><![CDATA[neuromorphic]]></category>
		<category><![CDATA[neuromorphic hardware for brain network simulation]]></category>
		<category><![CDATA[real-time anesthesia simulation using digital brain models]]></category>
		<category><![CDATA[real-time neural dynamics in anesthesia]]></category>
		<category><![CDATA[Scientific Research]]></category>
		<guid isPermaLink="false">https://scienmag.com/?p=286754</guid>

					<description><![CDATA[General anesthesia remains one of the most routine yet least understood interventions in modern medicine. Every day, millions of patients cross the invisible boundary between wakefulness and unconsciousness under drugs such as propofol and isoflurane, yet the precise neurobiological mechanisms]]></description>
										<content:encoded><![CDATA[<p>General anesthesia remains one of the most routine yet least understood interventions in modern medicine. Every day, millions of patients cross the invisible boundary between wakefulness and unconsciousness under drugs such as propofol and isoflurane, yet the precise neurobiological mechanisms driving that transition continue to elude neuroscientists. Now, a team of researchers from Lishui Municipal Central Hospital, The Fifth Affiliated Hospital of Wenzhou Medical University, and Hangzhou Dianzi University in China has taken an unusual route toward closing that gap: they built a working digital model of a cortical brain network on a single computer chip and used it to replay the stages of anesthesia in real time. The study, published in Frontiers in Systems Neuroscience, describes a neuromorphic hardware system that emulates 10,000 spiking neurons on a field-programmable gate array (FPGA), a class of reconfigurable silicon that can be wired into virtually any digital circuit a designer imagines.</p>
<p>The motivation is fundamentally computational. Traditional software simulations of large-scale brain networks, typically run on general-purpose CPUs or GPUs, are powerful but slow, energy-hungry, and rarely capable of true real-time performance when thousands of interconnected neurons must exchange spikes continuously. The Chinese team, led by Chuanguang Wang and corresponding authors Xiaotian Pan and Fang Zheng, argues that this bottleneck matters clinically: if researchers ever want brain-machine interfaces or closed-loop anesthetic delivery systems that respond to a patient&#8217;s brain state as it unfolds, the underlying model must run at biological speed. FPGAs, with their massive parallelism, deterministic timing, low latency, and exceptional energy efficiency, offer a way to map the structure of a neural network directly onto digital hardware rather than simulating it sequentially in software.</p>
<p>The network itself is biologically grounded. It comprises 10,000 spiking neurons divided in the same 4:1 ratio found in the neocortex: 8,000 excitatory neurons and 2,000 inhibitory ones. Each neuron obeys the Izhikevich model, a two-dimensional system of differential equations celebrated for reproducing realistic firing patterns at a fraction of the computational cost of biophysically detailed Hodgkin-Huxley models. The excitatory population is tuned for regular spiking behavior, while the inhibitory neurons are configured for fast spiking, mirroring the principal cell types of the mammalian cortex. Rather than connecting neurons randomly, the team mapped them onto a two-dimensional spatial grid and defined connection probability as an exponentially decaying function of physical distance, capturing the wiring economy that real brains exploit to minimize axonal length while preserving integration.</p>
<p>That spatial realism came with a hard engineering constraint. To fit the entire connectivity matrix within the FPGA&#8217;s on-chip Block RAMs and avoid the severe latency penalties of external DRAM, the researchers aggressively bounded the spatial decay, yielding a sparse topology of exactly 68,608 physical synapses across the network, an average of roughly 6.86 synapses per neuron. The decay constant was not chosen arbitrarily; it was analytically derived from percolation theory to guarantee that the network forms a single giant connected component without isolated sub-graphs. The team is candid that this extreme sparsity is a hardware-necessitated abstraction rather than a biological replica, and it forced a compensating choice: the simulated awake state settles at an artificially elevated firing rate of around 20 Hz, far above the sparse 2-5 Hz typical of in vivo cortical recordings, because a massively reduced point-neuron population needs that synthetic excitability to sustain network criticality and prevent spontaneous activity from collapsing entirely.</p>
<p>With the network in place, the researchers turned it into an anesthesia laboratory. Drugs such as propofol do not uniformly silence neurons; they disrupt the balance of excitation and inhibition, most commonly by enhancing GABAergic inhibition, prolonging inhibitory postsynaptic currents, and hyperpolarizing target neurons. The team captured this pharmacology by dynamically modulating two parameters: the inhibitory synaptic decay time constant and the absolute magnitude of inhibitory synaptic weights. In the baseline awake state, the network fires asynchronously at high rates. As the simulated anesthetic concentration increases, prolonged inhibitory kinetics force the population into a synchronized oscillatory regime, visible in raster plots as distinct vertical bands of collective firing that mimic the slow-wave dynamics characteristic of light general anesthesia. At the deepest simulated state, overwhelming inhibition combined with reduced excitatory background drive suppresses firing below 1 Hz, reproducing the profound attenuation of cortical dynamics seen before major surgery.</p>
<p>The spectral analysis is where the model&#8217;s clinical relevance becomes tangible. The researchers computed a surrogate local field potential, a temporally smoothed population spike count, and examined its power spectral density across the three states. In the awake condition, relative delta-band power (0.5-4 Hz) accounted for a mere 0.01 percent of total spectral power. Under light anesthesia, enhanced GABAergic influence synchronized the network and pushed relative delta power up to 2.86 percent. In deep anesthesia, slow waves dominated, with the delta band contributing 8.28 percent of spectral power. That monotonic surge of low-frequency power closely mirrors the spectral trends observed clinically during general anesthesia, where delta-band dominance serves as a recognized marker of anesthetic depth. The authors are equally explicit about what the model cannot do: because it implements an isolated intracortical network without thalamic inputs, it cannot reproduce the prominent alpha-band rhythms that thalamocortical loops generate during light anesthesia, and its surrogate LFP is a mesoscopic proxy rather than true clinical EEG.</p>
<p>Perhaps the most striking result comes from statistical physics. Accumulating evidence suggests the awake cortex operates near a critical phase transition, an optimal regime for information processing, and a hallmark of that state is the emergence of neuronal avalanches, cascades of spontaneous spiking whose size distribution follows a power law with a critical exponent near 1.5. The team extracted avalanches from their simulated network and found exactly that: in the awake state, the size distribution followed a power law with an exponent of 1.492 (95 percent confidence interval 1.481-1.503), and a power-law model outperformed an exponential alternative with R-squared above 0.999. As simulated anesthesia deepened, the power law broke down, an exponential cutoff emerged in the distribution tail, and the branching parameter declined monotonically from roughly 1 toward markedly lower values. In effect, the chip demonstrates mechanistically how anesthetic agents extinguish the brain&#8217;s critical dynamic equilibrium, fragmenting the large-scale cascades that integrate cortical activity.</p>
<p>The hardware engineering is as notable as the neuroscience. Rather than instantiating 10,000 discrete neuron circuits, which would cause prohibitive routing congestion, the architecture time-multiplexes a shared, deeply pipelined compute core across all neurons, exploiting the FPGA&#8217;s 100 MHz clock to update every state variable within a fraction of a biological millisecond. Constant multiplications in the Izhikevich equations were replaced by arithmetic shift-and-add operations, producing a nearly multiplier-less datapath that consumes just 4 of the chip&#8217;s 840 DSP slices. Fixed-point arithmetic, 24-bit Q8.16 format for membrane potentials and 16-bit Q4.12 for synaptic weights, halved the memory footprint without degrading dynamics. Spike routing is event-driven: when a neuron crosses the 30 mV threshold, only its index enters a FIFO, and a compressed sparse row structure fetches just the active synaptic destinations. The full implementation occupies less than 2 percent of the Kintex-7 FPGA&#8217;s logic resources, 25 percent of its Block RAM, and an estimated 1.24 W of power, roughly 12.5 picojoules per synaptic operation.</p>
<p>Timing analysis confirms the real-time claim. The worst case occurs during the highly active awake state, when about 235 neurons spike per biological millisecond; even then, the complete compute-and-route cycle consumes 11,847 clock cycles, finishing a biological millisecond in just 118.5 microseconds, roughly 8.4 times faster than real time. In suppressed deep-anesthesia states, routing cycles collapse further. Crucially, the fixed-point hardware was validated against its floating-point software counterpart through a closed-loop, self-checking testbench in which both systems started from identical states and were compared cycle by cycle. Across awake, light, and deep anesthesia benchmarks, firing rate errors stayed within 1.3 to 1.6 percent, and Pearson correlations exceeded 0.98 at both the population level and in single-neuron membrane potential trajectories, demonstrating that hardware efficiency was achieved without sacrificing scientific accuracy.</p>
<p>The authors stress that the system has been validated only against software simulations, not clinical EEG or patient data, so direct clinical deployment remains a future objective. But the framework points toward three concrete applications: depth-of-anesthesia monitoring, where the model could provide biophysically plausible ground truth for testing EEG-based indices; closed-loop anesthesia control, where real-time neuromorphic execution would let engineers prototype adaptive drug delivery controllers in a safe in-silico environment; and education, where the platform links synaptic-scale drug mechanisms to network-level clinical signatures. Future work will focus on integrating clinical EEG data to calibrate the network in real time and expanding the architecture to multi-regional brain simulations, potentially scaling from 10,000 to 100,000 neurons by instantiating four parallel compute cores. If that calibration succeeds, the path from a silicon chip replaying anesthesia to smarter, safer operating rooms may prove shorter than anyone expected.</p>
<p><strong>Subject of Research:</strong> Large-scale neuromorphic modeling of cortical networks on FPGA for investigating anesthetic-induced neural dynamics</p>
<p><strong>Article Title:</strong> Large-scale neuromorphic modeling of cortical networks on FPGA for investigating anesthetic-induced neural dynamics</p>
<p><strong>Article References:</strong> Wang, C., Pan, X., Chen, S., Cheng, H., Yao, Y., Zhang, G., &amp; Zheng, F. (2026). Large-scale neuromorphic modeling of cortical networks on FPGA for investigating anesthetic-induced neural dynamics. <em>Frontiers in Systems Neuroscience, 20</em>, Article 1866947. <a href="https://doi.org/10.3389/fnsys.2026.1866947" rel="noopener noreferrer">https://doi.org/10.3389/fnsys.2026.1866947</a></p>
<p><strong>Image Credits:</strong> AI Generated</p>
<p><strong>DOI:</strong> <a href="https://doi.org/10.3389/fnsys.2026.1866947" rel="noopener noreferrer">10.3389/fnsys.2026.1866947</a></p>
<p><strong>Keywords:</strong> Large-scale, neuromorphic, modeling, cortical, networks, FPGA, investigating, anesthetic-induced, neural, dynamics, scientific research</p>
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		<post-id xmlns="com-wordpress:feed-additions:1">286754</post-id>	</item>
	</channel>
</rss>
