Diffusive memristors operate based on ion dynamics, mimicking certain aspects of how biological neurons process and transmit information. This characteristic presents a unique opportunity to develop systems that not only emulate the functional aspects of biological neurons but also achieve higher energy efficiency and spatial compactness. At the core of this advancement, researchers have conceptualized a novel spiking artificial neuron, which consists of a single diffusive memristor, a transistor, and a resistor—collectively referred to as the 1M1T1R design. This minimalist architecture occupies only the footprint of a traditional transistor, making it an exemplary model for modern neuromorphic systems.

The 1M1T1R neuron embodies six critical characteristics commonly associated with biological neurons, which are essential for functioning within a neural network context. These include leaky integration, where the neuron gradually loses information unless it is reinforced; threshold firing, which dictates the conditions under which the neuron fires or sends signals; cascaded connection, enabling interconnected neuron communication; intrinsic plasticity, allowing the neuron to adapt its behavior based on experience; refractory periods, during which a neuron cannot reactivate after firing; and stochasticity, introducing an element of randomness in firing patterns akin to biological variability.

One of the standout features of this design is its remarkably low energy consumption. The 1M1T1R neuron operates at the picojoule level per spike, with potential advancements suggesting it could achieve even lower energy thresholds nearing the attojoule range with further miniaturization. This drastic reduction in energy requirements not only aligns with the principles of sustainability and efficiency but also opens avenues for practical applications in portable and power-constrained environments.

The neuronal characteristics of the 1M1T1R neuron have profound implications when simulating recurrent spiking neural networks. By incorporating these foundational traits into a computational model, researchers can observe how such attributes enhance overall network performance. This simulation holds promise for various applications, from enhancing machine learning algorithms to developing advanced robotics systems capable of adaptive learning and complex decision-making.

The ability to induce these intrinsic properties in artificial neurons highlights the potential for creating systems that can learn and adapt over time, much like their biological counterparts. The significance of intrinsic plasticity cannot be overstated, as it facilitates the continuous evolution and adjustment of synaptic strengths based on inputs and experience, thereby mimicking the learning capabilities of human brains.

As researchers continue to explore the practical implications of such technologies, the transition from theoretical concepts to tangible applications becomes more realistic. The 1M1T1R neuron could pave the way for advancements not only in artificial intelligence but also in understanding and modeling the complexities of biological systems themselves. By integrating memristive behavior, future AI systems can attain a level of sophistication previously thought unattainable.

The opportunity for scalability in these artificial neurons is another aspect that stands out. As technology progresses, the current design heralds a new generation of compact neuromorphic chips that can feasibly integrate millions, if not billions, of such neurons. This could lead to a leap in computational capabilities, potentially enabling machines to process information in real-time with unprecedented efficiency.

Emerging from the intersection of materials science, artificial intelligence, and electrical engineering, the 1M1T1R neuron represents a holistic approach to neuromorphic computing. By unifying the principles of nature with modern technology, researchers are poised to redefine what is possible in automated systems. This innovative pathway may not only enhance computational efficiency but also allow for nuanced interactions between machines and their environments.

As this field evolves and new breakthroughs are made, we may find ourselves at the cusp of a significant paradigm shift in both artificial intelligence and our understanding of neural networks. The ongoing exploration of diffusive memristors could potentially unlock solutions to challenges that have long impeded advancements in AI and computational neuroscience. As scientists unravel the intricacies of these systems, the fusion of living biological principles with technological innovation may yield transformative applications that redefine our relationship with machines.

In conclusion, the introduction of a spiking artificial neuron based on a diffusive memristor enhances the global landscape of neuromorphic computing. It exemplifies the shift from reliance on traditional CMOS technology to a more organic, adaptable framework for creating artificial intelligence systems. The optimization of neuronal characteristics not only improves efficiency but also aligns computational models more closely with biological processes. This innovative direction promises a future where artificial neural systems can operate with the efficiency, complexity, and capability resembling that of human intelligence.

Subject of Research: Neuromorphic Computing and Spiking Artificial Neurons

Article Title: A spiking artificial neuron based on one diffusive memristor, one transistor and one resistor

Article References: Zhao, R., Wang, T., Moon, T. et al. A spiking artificial neuron based on one diffusive memristor, one transistor and one resistor.
Nat Electron (2025). https://doi.org/10.1038/s41928-025-01488-x

Image Credits: AI Generated

DOI: 10.1038/s41928-025-01488-x

Keywords: Neuromorphic Computing, Diffusive Memristors, Artificial Neurons, Energy Efficiency, Stochasticity, Spiking Neural Networks

As conventional silicon-based Complementary Metal-Oxide-Semiconductor (CMOS) technology approaches the limits of physical scalability, the semiconductor industry has turned its focus to 2D materials. The physical constraints faced by silicon below the sub-nanometer scale have fueled the need for new materials that can effectively continue to enhance electrical performance while maintaining a small footprint. Emerging 2D semiconductors, characterized by their atomic-level thickness yet stable electrical properties, are being considered as the next evolutionary step in semiconductor technology.

However, despite their promise, these 2D semiconductors face one major impediment to commercialization: the integration of high-quality gate stacks. These gate stacks are critical structures that play a key role in controlling the electrostatic behavior of the transistor channel. As such, the performance and stability of a transistor hinge significantly on the quality of its gate stack. The challenge arises when conventional silicon processes are applied to 2D materials, resulting in degraded quality and an increase in interface defects as well as leakage currents.

In this pivotal study, Professor Lee’s team undertook a comprehensive benchmarking process to compare various gate stack integration approaches. They categorized these methods into five distinct groups, identifying their unique characteristics and evaluating them against critical performance metrics such as interface trap density and equivalent oxide thickness. By benchmarking these technologies, the team established a systematic roadmap that becomes essential for the academia and industry as they strive toward the successful commercial application of 2D transistors.

The research also highlighted innovative approaches, particularly the incorporation of ferroelectric materials within gate stacks. This strategy is poised to revolutionize the field by facilitating ultra-low-power logic applications, non-volatile memory solutions, and enhancing the possibilities for in-memory computing. By detailing the technical prerequisites, including Back-End-of-Line (BEOL) compatibility and low-temperature deposition requirements, the research underscores its real-world applicability and potential in advancing next-generation semiconductor devices.

As the technology landscape evolves toward the post-silicon era, leading semiconductor companies, including major brands like Samsung and Intel, have begun to weave 2D transistor technology into their long-term strategies. The transition from exploring 2D semiconductors as a possibility to actively developing them as a core technology signifies a major leap forward for the industry. Companies have recognized the immense potential that 2D transistors hold for enhancing device functionality, making the need for robust gate stack solutions even more urgent.

The implications of the research extend beyond mere theoretical promise. By providing a well-defined roadmap, the study not only sets clear benchmarks for future research but also enables closer collaboration between academic researchers and industry players. This collaboration is critical for overcoming the remaining barriers to commercialization and driving the development of applications that could impact various fields, including artificial intelligence, ultra-low-power mobile technology, and high-density computing systems.

Professor Lee emphasized the importance of high-quality gate stacks for the successful uptake of 2D transistors in commercial applications. The research team’s findings present a foundational blueprint aimed at addressing the pressing challenges faced by the semiconductor industry. Furthermore, they foresee an expansion of their investigative efforts aimed at the practical integration of these technologies into functional devices.

The lead author of this paper, Dr. Yeon Ho Kim, currently serves as a postdoctoral researcher dedicated to exploring contact and gate stack engineering for 2D transistors. As a foremost contributor to this pivotal research, Dr. Kim is anticipated to play a crucial role in the continued progress of 2D semiconductor technologies, bringing both academic and industrial expertise to the field.

The significance of this research is heightened by its support from pivotal organizations such as the Ministry of Science and ICT in South Korea, which recognizes the potential of next-generation semiconductors. This backing underscores a national commitment to advancing technology that could bolster South Korea’s global competitiveness in the semiconductor landscape.

Furthermore, Seoul National University’s College of Engineering has established itself as a frontrunner in semiconductor research. With a commitment to fostering leaders for the global industry, the College aims to not only advance technological frontiers but also nurture the talent necessary to lead these innovations. The research team, under Professor Lee, continues to be at the forefront of global trends, shaping the course of next-generation semiconductor technologies through their innovative approaches and rigorous scientific inquiry.

In summary, the roadmap for gate stack engineering developed by Professor Lee’s team is expected to pave the way for significant advancements in semiconductor technology. By addressing the key challenges associated with the integration of 2D transistors, this research holds promise for overcoming current limitations and ushering in a new era of high-performance, efficient semiconductor devices that can meet the demands of future computing needs.

Subject of Research: Engineering of Gate Stacks for 2D Transistors
Article Title: Gate Stack Engineering of Two-Dimensional Transistors
News Publication Date: 10-Sep-2025
Web References: Nature Electronics
References: DOI: 10.1038/s41928-025-01448-5
Image Credits: © Nature Electronics, originally published in Nature Electronics

Keywords

2D Transistors, Gate Stacks, Semiconductor Technology, CMOS, Ferroelectric Materials, Integrated Devices, Roadmap, Professor Chul-Ho Lee.