The central difficulty in capacitor dielectrics is that the key requirements pull against one another. High permittivity, often written as high-k, allows more charge to be stored in a smaller volume, which is exactly what miniaturization demands. But permittivity is rarely constant with temperature. In many high-permittivity oxides, the dielectric constant varies strongly as the material passes through structural phase transitions, so a capacitor tuned at room temperature drifts badly when heated or cooled. Low loss, meanwhile, is essential because a dielectric that absorbs energy heats up, wastes power and degrades reliability. Decades of work on microwave dielectric ceramics, summarized in systematic reviews of the field, have shown that these metrics are deeply intertwined, and that improving one often comes at the expense of another.

The theoretical roots of this trade-off go back a long way. A classic 1969 review by Harrop examined the intrinsic relationship between permittivity and the temperature coefficient of capacitance in solid dielectrics, showing that the way a material’s polarizability changes with temperature is tied to its dielectric constant itself. In practice, engineers have long compensated for this by mixing materials with positive and negative temperature coefficients, or by designing composites and solid solutions whose opposing temperature behaviors cancel out. The tungsten bronze family of oxides, named for the distinctive crystal structure its members share, has been a productive hunting ground for such engineered dielectrics because its open framework tolerates substitution of multiple cations on several distinct crystallographic sites, offering an enormous compositional design space.

That design space is also the problem. With several cation sites, each of which can host different elements at different concentrations, the number of candidate compositions explodes combinatorially. Traditional materials development relies on intuition, empirical rules and laborious iterative synthesis, in which each sample must be prepared, sintered and characterized before the next composition can be chosen. Exploring a multi-element space like substituted tungsten bronzes this way can take years. Machine learning promises to change the economics of that search by learning the mapping between composition, structure and properties from available data, then predicting which unexplored compositions are most likely to succeed. But a single model trained to optimize one number rarely suffices when the goal is to satisfy several competing criteria simultaneously.

The study, led by Qi and colleagues, addresses this with a hierarchical multi-objective machine learning workflow, a strategy illustrated in the research briefing’s overview figure. Rather than asking one model to find a material that is simultaneously high-k, low-loss and temperature-stable, the approach organizes the design problem into layers, in which models guide successive stages of screening and refinement. Multi-objective optimization of this kind is well suited to dielectric design because the target is not a single maximum but a balanced region of property space. A composition with record permittivity but unacceptable temperature drift is as useless for a chip capacitor as one that is perfectly stable but stores too little charge. The hierarchy allows the search to prune the vast compositional space early and concentrate experimental effort where the balance of properties looks most promising.

The outcome of that search is a bismuth and germanium co-substituted tungsten bronze ceramic. Co-substitution is the key design move: introducing two different substituent elements into the bronze framework lets the researchers tune the polarizability of the lattice and its temperature dependence at the same time, rather than adjusting one property and hoping the other holds. According to the study summary, the resulting material exhibits balanced dielectric properties, meaning it does not sacrifice temperature stability to achieve high permittivity or vice versa. The practical payoff is concrete: capacitors built with this dielectric can achieve a substantial reduction in volume compared with existing devices, which translates directly into more board space for other functions or into smaller and lighter end products.

The significance for the electronics industry is easy to overstate in headlines but hard to overstate in practice. Capacitor volume is a genuine constraint in modern hardware design. Power delivery networks on processor boards require large numbers of decoupling capacitors placed close to the chips they serve, and every cubic millimeter they occupy is a cubic millimeter unavailable for computation, memory or battery. In wearables and medical devices, where volume is at an absolute premium, dielectric materials with higher volumetric efficiency can change what is feasible at the system level. A dielectric that maintains its capacitance across the full operating temperature range also simplifies circuit design, because engineers do not need to over-provision capacitance to cover worst-case drift at temperature extremes.

The work also fits into a broader shift in how electronic materials are discovered. The field of dielectric ceramics has a long and distinguished history, reaching back to perspectives on the subject in the early 2000s that framed both its achievements and its open challenges. What is new is the maturation of machine learning as a practical design tool rather than a speculative one. Hierarchical and multi-objective strategies like the one reported here reflect a growing recognition that materials discovery is not a single optimization problem but a sequence of decisions, each with its own uncertainties, and that workflows mirroring the actual structure of experimental research can outperform brute-force screening. As datasets of measured dielectric properties grow, such approaches should become more accurate and more general, extending beyond tungsten bronzes to other structural families.

There remain, of course, the usual steps between a promising ceramic and mass production. A new dielectric must be compatible with the electrode materials and firing schedules of multilayer capacitor manufacturing, must survive reliability qualification, and must be reproducible at scale with tight tolerances on composition. The study summary does not detail these engineering hurdles, and readers should be cautious about assuming immediate commercialization. Nevertheless, the demonstration that a machine learning guided search can land on a co-substituted composition with genuinely balanced properties, and that this balance translates into smaller capacitors, is a meaningful proof of concept for data-driven dielectric design.

For the research community, the message is that the stubborn trade-offs of dielectric physics are not immutable laws of engineering failure but constraints that can be navigated with the right combination of structural chemistry and computational search. The intrinsic coupling between permittivity and temperature behavior that Harrop described more than half a century ago still holds, but hierarchical machine learning offers a way to find the rare compositions where the coupling works in the designer’s favor. If the approach generalizes, the next generation of chip capacitors may owe their compactness not to clever circuit tricks but to algorithms that explored millions of possible ceramics and pointed experimenters to the few worth synthesizing. That would mark a quiet but consequential change in one of electronics’ oldest component technologies, and a further step toward materials development that is guided by prediction rather than by trial and error.

Subject of Research: Machine learning design of temperature-stable high-permittivity dielectric ceramics for miniaturized microchip capacitors

Article Title: Designing dielectrics for microchip capacitors

Article References: Designing dielectrics for microchip capacitors. (n.d.). https://doi.org/10.1038/s41928-026-01726-w

Image Credits: AI Generated

DOI: 10.1038/s41928-026-01726-w

Keywords: dielectrics, capacitors, machine learning, tungsten bronze, high-k materials, temperature stability, bismuth, germanium, ceramic materials, miniaturization, electronics, materials design

The breakthrough, published in the prestigious international journal Science, was led by Prof. Jianhua Hao, Head of the Department of Physics and Materials, Chair Professor of Materials Physics and Devices and Associate Director of the PolyU-Wuhan Technology and Innovation Research Institute at PolyU. The collaboration included researchers from the National University of Singapore, The Hong Kong University of Science and Technology, Peking University, and the Singapore University of Technology and Design. Dr. Zehan Wu, Research Assistant Professor in the same department, is the first author of the research article. Their work addresses what the International Roadmap for Devices and Systems (IRDS) has identified as one of the most pressing bottlenecks in modern microelectronics, and it does so using a device architecture that the roadmap itself has flagged as the most promising successor to today’s dominant transistor design.

To appreciate why this matters, it helps to understand how the transistors inside every laptop, smartphone, and data centre actually work. Integrated circuits are built from complementary metal–oxide–semiconductor field-effect transistors, or MOSFETs, which switch electrical current by raising or lowering an energy barrier. In the OFF state, charges face a barrier they cannot cross; when a gating voltage is applied, charges gain enough thermal energy to spill over the top of that barrier in a process called thermionic emission. The steepness of this transition, measured by a figure known as the subthreshold swing (SS), determines how much voltage is needed to flip the transistor from OFF to ON. Here nature intervenes: because thermionic emission depends on the thermal distribution of electron energies, the subthreshold swing of any MOSFET cannot fall below 60 millivolts per decade of current at room temperature. That is the Boltzmann limit, and it is not an engineering shortfall but a consequence of statistical mechanics itself.

The consequences of this limit are profound. As chipmakers pack more transistors onto each processor, the 60 mV decade⁻¹ floor forces operating voltages to remain far higher than ideal, which means wasted power, wasted heat, and a hard ceiling on energy efficiency. Advanced MOSFETs typically require gate-voltage ranges of around 800 millivolts to operate, and every millivolt of that overhead is multiplied billions of times across a modern chip. For the artificial intelligence accelerators now driving enormous growth in global electricity consumption, the inability to switch transistors at lower voltages has become one of the defining engineering challenges of the decade. Breaking the 60 mV barrier is therefore not an incremental improvement but a potential inflection point for the entire industry.

The escape route identified by physicists is quantum tunnelling. Instead of forcing electrons to climb over an energy barrier, a tunnelling field-effect transistor (TFET) allows them to pass straight through it, exploiting the quantum-mechanical probability that particles can traverse barriers that would classically be impenetrable. Because tunnelling probability depends on the barrier’s width and height rather than on the thermal energy of the electrons, a TFET can in principle achieve subthreshold swings steeper than 60 mV decade⁻¹ even at room temperature. The IRDS has singled out TFETs as the most promising alternative to MOSFETs precisely for this reason. In practice, however, experimental TFETs have struggled for years with a frustrating trade-off: devices that achieved steep switching typically delivered painfully low output currents, undermining their usefulness in real circuits.

Prof. Hao’s team solved this problem with an elegantly engineered material system. Using pulsed laser deposition (PLD), a technique in which intense laser pulses vaporise a target material so that it recondenses as an ultra-thin film, the researchers fabricated an alternating heterostructure of two-dimensional bismuth (Bi) and indium selenide (InSe) layers. The choice of bismuth is the crucial insight. In its bulk form, bismuth is a semi-metal, a material that is neither a proper conductor nor a proper semiconductor. But when reduced to two-dimensional form with precise control over the layer structure at the nanoscale, bismuth transforms into a semiconductor. This transformation allowed the team to engineer an ideal energy band alignment between the bismuth and the indium selenide, creating exactly the conditions needed for charge carriers to tunnel efficiently from one material into the other through the quantum tunnelling mechanism.

The performance figures reported in the study are striking. The resulting Bi/InSe TFET achieved subthreshold swing values well below the 60 mV decade⁻¹ thermionic limit, and it maintained this steep switching behaviour across six orders of magnitude of current, a range that matters enormously for practical digital logic, where transistors must remain reliably OFF across many conditions rather than only at a single operating point. Remarkably, the device accomplished all of this at room temperature, on standard centimetre-scale silicon substrates, without exotic cryogenic cooling or specialised wafer treatments. The operating gate-voltage range required was only 160 millivolts, a fraction of the roughly 800 millivolts demanded by advanced MOSFETs, translating directly into the kind of power savings that next-generation computing demands.

Just as importantly, the device resolved the long-standing weakness of previous experimental TFETs. The PolyU-led team demonstrated a high output current of up to several microamps per micrometre alongside an exceptionally high ON/OFF current ratio. Output current is not a vanity metric: it determines whether a single transistor can drive multiple downstream logic gates, a capability engineers call fan-out, and whether signals propagate through a circuit with minimal delay. A steep-switching transistor that cannot deliver adequate current would force designers into cumbersome workarounds and erode the very efficiency gains it promises. By combining steep slopes with robust current drive, the Bi/InSe device demonstrates compatibility with existing integrated-circuit design practices and even the potential for a generational upgrade of current chips rather than a disruptive replacement.

The manufacturing dimension of the work may prove as consequential as the physics. Pulsed laser deposition has long been valued in research laboratories for its precision, but questions have lingered about whether it can serve high-precision, wafer-scale production of two-dimensional materials. This study demonstrates the practical viability of PLD for exactly that role, producing uniform ultra-thin heterostructures on silicon substrates that are the backbone of the existing semiconductor industry. Because the device integrates seamlessly with traditional silicon-based manufacturing processes, the researchers argue that their approach provides a scalable roadmap toward energy-efficient microchips, rather than a laboratory curiosity that would require an entirely new industrial ecosystem to deploy. That compatibility with ultra-short channel lengths, which two-dimensional materials are particularly well suited to support, positions the technology for the transistor geometries that future process nodes will demand.

The implications extend well beyond the laboratory bench. Ultra-low-power, high-performance integrated circuits built on tunnelling transistors could reshape the energy economics of artificial intelligence, where specialised hardware already consumes power on the scale of entire cities, and where every reduction in switching voltage compounds across billions of operations per second. Prof. Hao has emphasised that the technology paves the way for the ICs essential to emerging AI chips and advanced semiconductor applications, and the publication of the findings in Science signals that the broader research community regards the result as a landmark. For decades, the Boltzmann limit has stood as an immovable fact of life for chip designers, a boundary drawn by thermodynamics itself. By replacing thermionic emission with quantum tunnelling in a carefully crafted two-dimensional heterostructure, the PolyU-led team has shown that the boundary can be crossed, and in doing so has brought a long-awaited experimental technology a decisive step closer to commercial reality.

Subject of Research: A quantum-tunnelling field-effect transistor based on two-dimensional bismuth and indium selenide heterostructures that overcomes the Boltzmann switching limit in integrated circuits

Article Title: PolyU develops quantum-tunnelling field-effect transistor to overcome barriers to integrated-circuit chip development

Article References: PolyU develops quantum-tunnelling field-effect transistor to overcome barriers to integrated-circuit chip development. (n.d.). Original publication

Image Credits: AI Generated

DOI: Not provided

Keywords: quantum tunnelling, tunnelling field-effect transistor, TFET, two-dimensional materials, bismuth, indium selenide, Boltzmann limit, subthreshold swing, pulsed laser deposition, integrated circuits, low-power electronics, AI chips

Condensed-matter physics has now opened a different route into this territory, one that does not require finding a fundamental particle at all. Topological magnetoelectric theory predicts that the surface electrons of a topological insulator respond to an electric field in a remarkable way: when an active electric field is applied near the boundary between a topological insulator and a topologically trivial material such as vacuum, the electrons generate a magnetic response that can be mathematically described as an image magnetic monopole. In effect, the surface behaves as though a magnetic monopole were lurking just beneath it, mirroring the applied electric field the way an ordinary image charge mirrors an electric charge. The prediction is elegant, but realizing it in the laboratory demands two difficult things at once: a way to create an electric field that is intense and localized on nanometre scales, and a way to detect the faint magnetic response it induces. A new experimental study suggests that both requirements can be met with a single, well-established instrument.

Scanning tunnelling microscopy, or STM, turns out to be a natural engine for this kind of physics. When a sufficiently large bias voltage is applied between the microscope’s metallic tip and the sample, the instrument enters the field-emission regime: electrons are torn from the tip apex and travel across the tunnelling junction toward the sample surface. This process produces an intense, highly localized active electric field confined to the tiny gap between tip and surface, exactly the kind of field that topological magnetoelectric theory calls for. Crucially, the field in the junction has more structure than a simple perpendicular pull. It comprises the tip-induced field together with a transient field generated by the moving, field-emitted electrons themselves, and the tip-induced field possesses a radial component, Er, that points outward from the junction axis. The strength of this radial component depends inversely on the dielectric constant of the substrate and on the tip-sample distance, a dependence that would soon prove decisive in interpreting the experiment.

The same field-emission conditions create a second phenomenon that serves as the experiment’s readout mechanism. An electron that has been emitted but has not yet joined the sample remains outside the surface, where it is attracted by the image charge it induces in the material beneath it. This attractive potential can briefly trap the electron just outside the surface, binding it into a ladder of Rydberg-like electronic states known as image potential states, or IPSs. These states hover nanometres above the surface, exquisitely sensitive to anything that perturbs the electrostatic landscape there, including the active electric field produced by the tip. On ordinary, topologically trivial surfaces, IPSs form a conventional, predictable series of spectroscopic peaks. That predictability is precisely what makes them powerful: any deviation from the expected pattern signals that something unusual is happening at the surface, and the details of the deviation encode what that something might be.

A research team led by Lan Chen at the Institute of Physics of the Chinese Academy of Sciences exploited this sensitivity to examine IPSs on Bi(111), the (111) surface of bismuth, which possesses higher-order topological character. Higher-order topological insulators, or HOTIs, are materials whose unusual topology manifests not in conducting edge channels on every boundary, as in conventional topological insulators, but in more subtle surface electronic structure that emerges under specific conditions. Using low-temperature STM, the researchers first established a baseline: on topologically trivial reference surfaces, the spectra displayed the conventional series of IPS peaks, exactly as textbook physics predicts. When they turned to Bi(111), however, the spectra revealed a strikingly unexpected splitting of the IPS features, an anomaly with no place in the standard description of image-potential states and an immediate hint that the higher-order topology of the surface was somehow involved.

To trace the origin of the splitting, the researchers systematically varied two experimental parameters: the thickness of the Bi(111) films and the dielectric properties of the substrate supporting them. The results were revealing. In the thinnest Bi(111) films, the anomalous splitting was entirely absent; it appeared only as the films grew thick enough for the characteristic Bi(111) surface electronic structure to develop. This thickness dependence tied the anomaly directly to the emergence of the topological surface states rather than to any bulk property of bismuth or to a generic artifact of the measurement. The surface electronic structure, in other words, was not a bystander but an active participant in producing the splitting, consistent with the idea that the effect involves the special response of topological surface electrons to the local field environment created by the STM junction.

The substrate experiments delivered the second, and arguably most telling, clue. When Bi(111) was supported on semiconducting Si(111), which screens electric fields only weakly, the splitting grew as the tunnelling current was raised and the STM tip moved closer to the surface, intensifying the field in the junction. When Bi(111) rested instead on metallic Sb(111), a far more effective screening substrate, the splitting remained nearly unchanged regardless of tip approach. This contrast indicates that the anomalous splitting is governed not by the perpendicular electric field in the junction, the component one might naively expect to dominate, but by the radial component of the active electric field, the component whose strength is controlled by substrate screening. A purely electrostatic explanation tied to the perpendicular field could not account for this behavior, pointing instead toward a coupling between the radial field and the surface’s electronic structure that carries magnetic-response character.

Building on these observations, the researchers proposed a phenomenological picture that connects all the pieces. In their interpretation, the radial active electric field couples to the Bi(111) surface electronic structure and induces an effective magnetic-response-like perturbation, one that is compatible with the monopole-like topological magnetoelectric response predicted by theory. Such a perturbation would lift the degeneracy of the orbital-like sublevels of the image potential states, splitting what should be a single peak into the multiple components observed in the spectra. The thickness dependence enters because the surface states that participate in this coupling only exist once the film is thick enough; the substrate dependence enters because screening controls the radial field strength. Within this framework, every experimental observation finds a natural place, and the anomalous splitting becomes a candidate spectroscopic fingerprint of a phenomenon that has otherwise been accessible only through theoretical formalism.

The broader significance of the work lies in the experimental method itself. Field-emission IPS spectroscopy, as demonstrated here, accomplishes in a single measurement what previously required separate capabilities: it simultaneously creates a highly localized active electric field through the STM tip and sensitively probes the surface’s response to that field through the trapped image-potential states. This dual role transforms the STM from a passive imaging tool into an active probe of magnetoelectric coupling at higher-order topological surfaces. For a field in which the central prediction, the image magnetic monopole, has remained a theoretical construct awaiting a practical detection strategy, the demonstration that a splitting of Rydberg-like surface states can serve as its signature represents a genuine methodological advance, opening a new experimental route for investigating active-field responses in topological materials.

Much work remains before the interpretation is settled. The study, published in National Science Review with DOI 10.1093/nsr/nwag548, reports an experimental observation together with a phenomenological framework, and the proposed connection between the splitting and a monopole-like magnetoelectric response is presented as a possible, physically consistent explanation rather than a definitive proof. Nevertheless, the findings give physicists something they have rarely had in this area: a reproducible, tunable spectroscopic anomaly whose dependence on film thickness, substrate screening and tip-sample distance can be systematically mapped, and whose theoretical meaning can be sharpened with each new measurement. If subsequent studies confirm the monopole-like interpretation, the humble image-potential states that have hovered above surfaces since the early days of surface physics will have become the medium through which one of Dirac’s most enduring ideas finally meets a laboratory analogue, not in the cosmos or a collider, but in the nanometre-scale gap beneath a scanning tunnelling microscope tip.

Subject of Research: Anomalous image-potential state splitting on higher-order topological insulator Bi(111) as a spectroscopic probe of monopole-like topological magnetoelectric response

Article Title: Anomalous splitting of image-potential states on HOTI Bi(111) provides a new spectroscopic window into possible monopole-like topological magnetoelectric responses

Article References: Anomalous splitting of image-potential states on HOTI Bi(111) provides a new spectroscopic window into possible monopole-like topological magnetoelectric responses. (n.d.). Original publication

Image Credits: AI Generated

DOI: Not provided

Keywords: magnetic monopoles, topological insulators, bismuth, image-potential states, scanning tunnelling microscopy, magnetoelectric effect, field emission, higher-order topology, surface states, spectroscopy, condensed matter physics, National Science Review